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Message-ID: <20191130184612.GA17459@zn.tnic>
Date: Sat, 30 Nov 2019 19:46:12 +0100
From: Borislav Petkov <bp@...e.de>
To: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: Tony Luck <tony.luck@...el.com>, x86-ml <x86@...nel.org>,
lkml <linux-kernel@...r.kernel.org>
Subject: [GIT PULL] RAS urgent for 5.5
Hi Linus,
one urgent fix for the thermal throttling machinery: the recent change
reworking the thermal notifications forgot to mask out read-only and
reserved bits in the thermal status MSRs, leading to exceptions while
writing those MSRs. The fix below takes care of masking out those bits
first.
Please pull,
thanks.
---
The following changes since commit c2da5bdc66a377f0b82ee959f19f5a6774706b83:
Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip (2019-11-26 17:12:12 -0800)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git ras-urgent-for-linus
for you to fetch changes up to 5a43b87b3c62ad149ba6e9d0d3e5c0e5da02a5ca:
x86/mce/therm_throt: Mask out read-only and reserved MSR bits (2019-11-29 09:17:52 +0100)
----------------------------------------------------------------
Srinivas Pandruvada (1):
x86/mce/therm_throt: Mask out read-only and reserved MSR bits
arch/x86/kernel/cpu/mce/therm_throt.c | 17 ++++++++++++-----
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git a/arch/x86/kernel/cpu/mce/therm_throt.c b/arch/x86/kernel/cpu/mce/therm_throt.c
index d01e0da0163a..b38010b541d6 100644
--- a/arch/x86/kernel/cpu/mce/therm_throt.c
+++ b/arch/x86/kernel/cpu/mce/therm_throt.c
@@ -195,17 +195,24 @@ static const struct attribute_group thermal_attr_group = {
#define THERM_THROT_POLL_INTERVAL HZ
#define THERM_STATUS_PROCHOT_LOG BIT(1)
+#define THERM_STATUS_CLEAR_CORE_MASK (BIT(1) | BIT(3) | BIT(5) | BIT(7) | BIT(9) | BIT(11) | BIT(13) | BIT(15))
+#define THERM_STATUS_CLEAR_PKG_MASK (BIT(1) | BIT(3) | BIT(5) | BIT(7) | BIT(9) | BIT(11))
+
static void clear_therm_status_log(int level)
{
int msr;
- u64 msr_val;
+ u64 mask, msr_val;
- if (level == CORE_LEVEL)
- msr = MSR_IA32_THERM_STATUS;
- else
- msr = MSR_IA32_PACKAGE_THERM_STATUS;
+ if (level == CORE_LEVEL) {
+ msr = MSR_IA32_THERM_STATUS;
+ mask = THERM_STATUS_CLEAR_CORE_MASK;
+ } else {
+ msr = MSR_IA32_PACKAGE_THERM_STATUS;
+ mask = THERM_STATUS_CLEAR_PKG_MASK;
+ }
rdmsrl(msr, msr_val);
+ msr_val &= mask;
wrmsrl(msr, msr_val & ~THERM_STATUS_PROCHOT_LOG);
}
--
Regards/Gruss,
Boris.
SUSE Software Solutions Germany GmbH, GF: Felix Imendörffer, HRB 36809, AG Nürnberg
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