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Message-Id: <20191202182205.14629-2-afaerber@suse.de>
Date: Mon, 2 Dec 2019 19:21:51 +0100
From: Andreas Färber <afaerber@...e.de>
To: linux-realtek-soc@...ts.infradead.org
Cc: linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
Andreas Färber <afaerber@...e.de>,
James Tai <james.tai@...ltek.com>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>, devicetree@...r.kernel.org
Subject: [PATCH 01/14] ARM: dts: rtd1195: Introduce iso and misc syscon
Group watchdog and UART0 into an Isolation syscon mfd node.
Group UART1 into a Miscellaneous syscon mfd node.
Cc: James Tai <james.tai@...ltek.com>
Signed-off-by: Andreas Färber <afaerber@...e.de>
---
arch/arm/boot/dts/rtd1195.dtsi | 58 +++++++++++++++++++++++++++++-------------
1 file changed, 40 insertions(+), 18 deletions(-)
diff --git a/arch/arm/boot/dts/rtd1195.dtsi b/arch/arm/boot/dts/rtd1195.dtsi
index a8f7b9caacba..a74f530dc439 100644
--- a/arch/arm/boot/dts/rtd1195.dtsi
+++ b/arch/arm/boot/dts/rtd1195.dtsi
@@ -100,28 +100,22 @@
#size-cells = <1>;
ranges = <0x0 0x18000000 0x70000>;
- wdt: watchdog@...0 {
- compatible = "realtek,rtd1295-watchdog";
- reg = <0x7680 0x100>;
- clocks = <&osc27M>;
- };
-
- uart0: serial@...0 {
- compatible = "snps,dw-apb-uart";
- reg = <0x7800 0x400>;
- reg-shift = <2>;
+ iso: syscon@...0 {
+ compatible = "syscon", "simple-mfd";
+ reg = <0x7000 0x1000>;
reg-io-width = <4>;
- clock-frequency = <27000000>;
- status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x7000 0x1000>;
};
- uart1: serial@...00 {
- compatible = "snps,dw-apb-uart";
- reg = <0x1b200 0x100>;
- reg-shift = <2>;
+ misc: syscon@...00 {
+ compatible = "syscon", "simple-mfd";
+ reg = <0x1b000 0x1000>;
reg-io-width = <4>;
- clock-frequency = <27000000>;
- status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x1b000 0x1000>;
};
};
@@ -137,3 +131,31 @@
};
};
};
+
+&iso {
+ wdt: watchdog@680 {
+ compatible = "realtek,rtd1295-watchdog";
+ reg = <0x680 0x100>;
+ clocks = <&osc27M>;
+ };
+
+ uart0: serial@800 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x800 0x400>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clock-frequency = <27000000>;
+ status = "disabled";
+ };
+};
+
+&misc {
+ uart1: serial@200 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x200 0x100>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clock-frequency = <27000000>;
+ status = "disabled";
+ };
+};
--
2.16.4
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