linux-kernel - [PATCH 12/14] ARM: dts: aspeed-g5: Sort LPC child nodes by unit address

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Message-Id: <b45b4fbba8d80c1e6d0603f2dd0c2d3d69efc62a.1575369656.git-series.andrew@aj.id.au>
Date:   Tue,  3 Dec 2019 22:34:13 +1030
From:   Andrew Jeffery <andrew@...id.au>
To:     linux-aspeed@...ts.ozlabs.org
Cc:     joel@....id.au, robh+dt@...nel.org, mark.rutland@....com,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org
Subject: [PATCH 12/14] ARM: dts: aspeed-g5: Sort LPC child nodes by unit address

Lets try to maintain some sort of sanity.

Signed-off-by: Andrew Jeffery <andrew@...id.au>
Reviewed-by: Joel Stanley <joel@....id.au>
---
 arch/arm/boot/dts/aspeed-g5.dtsi | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index 57c9e45c9e16..954781b82fe3 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -473,17 +473,18 @@
 						status = "disabled";
 					};
 
-					lhc: lhc@20 {
-						compatible = "aspeed,ast2500-lhc";
-						reg = <0x20 0x24 0x48 0x8>;
-					};
-
 					lpc_reset: reset-controller@18 {
 						compatible = "aspeed,ast2500-lpc-reset";
 						reg = <0x18 0x4>;
 						#reset-cells = <1>;
 					};
 
+					lhc: lhc@20 {
+						compatible = "aspeed,ast2500-lhc";
+						reg = <0x20 0x24 0x48 0x8>;
+					};
+
+
 					ibt: ibt@c0 {
 						compatible = "aspeed,ast2500-ibt-bmc";
 						reg = <0xc0 0x18>;
-- 
git-series 0.9.1