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Message-ID: <1575344068.627.2.camel@mtksdaap41>
Date:   Tue, 3 Dec 2019 11:34:28 +0800
From:   CK Hu <ck.hu@...iatek.com>
To:     Bibby Hsieh <bibby.hsieh@...iatek.com>
CC:     David Airlie <airlied@...ux.ie>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Daniel Vetter <daniel.vetter@...ll.ch>,
        <dri-devel@...ts.freedesktop.org>,
        <linux-mediatek@...ts.infradead.org>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        YT Shen <yt.shen@...iatek.com>,
        Thierry Reding <thierry.reding@...il.com>,
        <linux-arm-kernel@...ts.infradead.org>, <tfiga@...omium.org>,
        <drinkcat@...omium.org>, <linux-kernel@...r.kernel.org>,
        <srv_heupstream@...iatek.com>,
        Yongqiang Niu <yongqiang.niu@...iatek.com>
Subject: Re: [PATCH v1 5/6] drm/mediatek: support CMDQ interface in ddp
 component

Hi, Bibby:

On Tue, 2019-12-03 at 10:56 +0800, CK Hu wrote:
> Hi, Bibby:
> 
> On Thu, 2019-11-28 at 10:42 +0800, Bibby Hsieh wrote:
> > The CMDQ (Command Queue) in MT8183 is used to help
> > update all relevant display controller registers
> > with critical time limation.
> > This patch add cmdq interface in ddp_comp interface,
> > let all ddp_comp interface can support cpu/cmdq function
> > at the same time.
> > 
> > Signed-off-by: YT Shen <yt.shen@...iatek.com>
> > Signed-off-by: CK Hu <ck.hu@...iatek.com>
> > Signed-off-by: Philipp Zabel <p.zabel@...gutronix.de>
> > Signed-off-by: Bibby Hsieh <bibby.hsieh@...iatek.com>
> > Signed-off-by: Yongqiang Niu <yongqiang.niu@...iatek.com>
> > ---
> >  drivers/gpu/drm/mediatek/mtk_disp_color.c   |   7 +-
> >  drivers/gpu/drm/mediatek/mtk_disp_ovl.c     |  65 ++++++-----
> >  drivers/gpu/drm/mediatek/mtk_disp_rdma.c    |  43 ++++---
> >  drivers/gpu/drm/mediatek/mtk_drm_crtc.c     |  11 +-
> >  drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 120 ++++++++++++++------
> >  drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h |  55 ++++++---
> >  6 files changed, 190 insertions(+), 111 deletions(-)
> > 
> 

[snip]

> > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
> > index ec55c7488cc3..5b0a3d48dfa6 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
> > +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
> > @@ -69,25 +69,30 @@ enum mtk_ddp_comp_id {
> >  };
> >  
> >  struct mtk_ddp_comp;
> > -
> > +struct cmdq_pkt;
> >  struct mtk_ddp_comp_funcs {
> >  	void (*config)(struct mtk_ddp_comp *comp, unsigned int w,
> > -		       unsigned int h, unsigned int vrefresh, unsigned int bpc);
> > +		       unsigned int h, unsigned int vrefresh,
> > +		       unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
> >  	void (*start)(struct mtk_ddp_comp *comp);
> >  	void (*stop)(struct mtk_ddp_comp *comp);
> >  	void (*enable_vblank)(struct mtk_ddp_comp *comp, struct drm_crtc *crtc);
> >  	void (*disable_vblank)(struct mtk_ddp_comp *comp);
> >  	unsigned int (*supported_rotations)(struct mtk_ddp_comp *comp);
> >  	unsigned int (*layer_nr)(struct mtk_ddp_comp *comp);
> > -	void (*layer_on)(struct mtk_ddp_comp *comp, unsigned int idx);
> > -	void (*layer_off)(struct mtk_ddp_comp *comp, unsigned int idx);
> > +	void (*layer_on)(struct mtk_ddp_comp *comp, unsigned int idx,
> > +			 struct cmdq_pkt *cmdq_pkt);
> > +	void (*layer_off)(struct mtk_ddp_comp *comp, unsigned int idx,
> > +			  struct cmdq_pkt *cmdq_pkt);

layer_on() and layer_off() looks useless, so I would like you just
remove this interface in another patch.

Regards,
CK

> >  	int (*layer_check)(struct mtk_ddp_comp *comp,
> >  			   unsigned int idx,
> >  			   struct mtk_plane_state *state);
> >  	void (*layer_config)(struct mtk_ddp_comp *comp, unsigned int idx,
> > -			     struct mtk_plane_state *state);
> > +			     struct mtk_plane_state *state,
> > +			     struct cmdq_pkt *cmdq_pkt);
> >  	void (*gamma_set)(struct mtk_ddp_comp *comp,
> > -			  struct drm_crtc_state *state);
> > +			  struct drm_crtc_state *state,
> > +			  struct cmdq_pkt *cmdq_pkt);
> >  	void (*bgclr_in_on)(struct mtk_ddp_comp *comp);
> >  	void (*bgclr_in_off)(struct mtk_ddp_comp *comp);
> >  };
> > @@ -99,14 +104,17 @@ struct mtk_ddp_comp {
> >  	struct device *dev;
> >  	enum mtk_ddp_comp_id id;
> >  	const struct mtk_ddp_comp_funcs *funcs;
> > +	resource_size_t regs_pa;
> > +	u8 subsys;
> >  };
> >  
> >  static inline void mtk_ddp_comp_config(struct mtk_ddp_comp *comp,
> >  				       unsigned int w, unsigned int h,
> > -				       unsigned int vrefresh, unsigned int bpc)
> > +				       unsigned int vrefresh, unsigned int bpc,
> > +				       struct cmdq_pkt *cmdq_pkt)
> >  {
> >  	if (comp->funcs && comp->funcs->config)
> > -		comp->funcs->config(comp, w, h, vrefresh, bpc);
> > +		comp->funcs->config(comp, w, h, vrefresh, bpc, cmdq_pkt);
> >  }
> >  
> >  static inline void mtk_ddp_comp_start(struct mtk_ddp_comp *comp)
> > @@ -152,17 +160,19 @@ static inline unsigned int mtk_ddp_comp_layer_nr(struct mtk_ddp_comp *comp)
> >  }
> >  
> >  static inline void mtk_ddp_comp_layer_on(struct mtk_ddp_comp *comp,
> > -					 unsigned int idx)
> > +					 unsigned int idx,
> > +					 struct cmdq_pkt *cmdq_pkt)
> >  {
> >  	if (comp->funcs && comp->funcs->layer_on)
> > -		comp->funcs->layer_on(comp, idx);
> > +		comp->funcs->layer_on(comp, idx, cmdq_pkt);
> >  }
> >  
> >  static inline void mtk_ddp_comp_layer_off(struct mtk_ddp_comp *comp,
> > -					  unsigned int idx)
> > +					  unsigned int idx,
> > +					  struct cmdq_pkt *cmdq_pkt)
> >  {
> >  	if (comp->funcs && comp->funcs->layer_off)
> > -		comp->funcs->layer_off(comp, idx);
> > +		comp->funcs->layer_off(comp, idx, cmdq_pkt);
> >  }
> >  
> >  static inline int mtk_ddp_comp_layer_check(struct mtk_ddp_comp *comp,
> > @@ -176,17 +186,19 @@ static inline int mtk_ddp_comp_layer_check(struct mtk_ddp_comp *comp,
> >  
> >  static inline void mtk_ddp_comp_layer_config(struct mtk_ddp_comp *comp,
> >  					     unsigned int idx,
> > -					     struct mtk_plane_state *state)
> > +					     struct mtk_plane_state *state,
> > +					     struct cmdq_pkt *cmdq_pkt)
> >  {
> >  	if (comp->funcs && comp->funcs->layer_config)
> > -		comp->funcs->layer_config(comp, idx, state);
> > +		comp->funcs->layer_config(comp, idx, state, cmdq_pkt);
> >  }
> >  
> >  static inline void mtk_ddp_gamma_set(struct mtk_ddp_comp *comp,
> > -				     struct drm_crtc_state *state)
> > +				     struct drm_crtc_state *state,
> > +				     struct cmdq_pkt *cmdq_pkt)
> >  {
> >  	if (comp->funcs && comp->funcs->gamma_set)
> > -		comp->funcs->gamma_set(comp, state);
> > +		comp->funcs->gamma_set(comp, state, cmdq_pkt);
> >  }
> >  
> >  static inline void mtk_ddp_comp_bgclr_in_on(struct mtk_ddp_comp *comp)
> > @@ -209,6 +221,13 @@ int mtk_ddp_comp_init(struct device *dev, struct device_node *comp_node,
> >  int mtk_ddp_comp_register(struct drm_device *drm, struct mtk_ddp_comp *comp);
> >  void mtk_ddp_comp_unregister(struct drm_device *drm, struct mtk_ddp_comp *comp);
> >  void mtk_dither_set(struct mtk_ddp_comp *comp, unsigned int bpc,
> > -		    unsigned int CFG);
> > -
> > +		    unsigned int CFG, struct cmdq_pkt *cmdq_pkt);
> > +enum mtk_ddp_comp_type mtk_ddp_comp_get_type(enum mtk_ddp_comp_id comp_id);
> > +void mtk_ddp_write(struct cmdq_pkt *cmdq_pkt, unsigned int value,
> > +		   struct mtk_ddp_comp *comp, unsigned int offset);
> > +void mtk_ddp_write_relaxed(struct cmdq_pkt *cmdq_pkt, unsigned int value,
> > +			   struct mtk_ddp_comp *comp, unsigned int offset);
> > +void mtk_ddp_write_mask(struct cmdq_pkt *cmdq_pkt, unsigned int value,
> > +			struct mtk_ddp_comp *comp, unsigned int offset,
> > +			unsigned int mask);
> >  #endif /* MTK_DRM_DDP_COMP_H */
> 

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