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Message-ID: <20191204193615.GA20880@bogus>
Date:   Wed, 4 Dec 2019 13:36:15 -0600
From:   Rob Herring <robh@...nel.org>
To:     Brian Masney <masneyb@...tation.org>
Cc:     robdclark@...il.com, sean@...rly.run, robh+dt@...nel.org,
        airlied@...ux.ie, daniel@...ll.ch, jcrouse@...eaurora.org,
        dianders@...omium.org, linux-arm-msm@...r.kernel.org,
        dri-devel@...ts.freedesktop.org, freedreno@...ts.freedesktop.org,
        linux-kernel@...r.kernel.org, mark.rutland@....com,
        devicetree@...r.kernel.org
Subject: Re: [PATCH v2 1/4] dt-bindings: drm/msm/gpu: document second
 interconnect

On Thu, 21 Nov 2019 20:26:42 -0500, Brian Masney wrote:
> Some A3xx and all A4xx Adreno GPUs do not have GMEM inside the GPU core
> and must use the On Chip MEMory (OCMEM) in order to be functional.
> There's a separate interconnect path that needs to be setup to OCMEM.
> Let's document this second interconnect path that's available. Since
> there's now two available interconnects, let's add the
> interconnect-names property.
> 
> Signed-off-by: Brian Masney <masneyb@...tation.org>
> ---
>  Documentation/devicetree/bindings/display/msm/gpu.txt | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 

Acked-by: Rob Herring <robh@...nel.org>

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