linux-kernel - Re: [PATCH 1/2] soc: imx: gpcv2: Add support for imx8mm

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Message-ID: <CAHCN7xLZt4QVZgH9zwZYprmmYyhVN=d7zc9-PUPdknOErwPX2g@mail.gmail.com>
Date:   Tue, 3 Dec 2019 21:42:13 -0600
From:   Adam Ford <aford173@...il.com>
To:     Philipp Zabel <p.zabel@...gutronix.de>
Cc:     arm-soc <linux-arm-kernel@...ts.infradead.org>,
        Mark Rutland <mark.rutland@....com>,
        devicetree <devicetree@...r.kernel.org>,
        Fabio Estevam <festevam@...il.com>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Rob Herring <robh+dt@...nel.org>,
        NXP Linux Team <linux-imx@....com>,
        Pengutronix Kernel Team <kernel@...gutronix.de>,
        Shawn Guo <shawnguo@...nel.org>
Subject: Re: [PATCH 1/2] soc: imx: gpcv2: Add support for imx8mm

On Mon, Dec 2, 2019 at 9:17 AM Adam Ford <aford173@...il.com> wrote:
>
> On Mon, Dec 2, 2019 at 8:28 AM Philipp Zabel <p.zabel@...gutronix.de> wrote:
> >
> > On Fri, 2019-11-29 at 17:41 -0600, Adam Ford wrote:
> > > The technical reference manual for both the i.MX8MQ and i.MX8M Mini
> > > appear to show the same register definitions and locations for the
> > > General Power Controller (GPC).
> > >
> > > This patch expands the table of compatible SoC's to include
> > > the i.MX8m Mini
> > >
> > > Signed-off-by: Adam Ford <aford173@...il.com>
> > >
> > > diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c
> > > index b0dffb06c05d..67c54cbb6c81 100644
> > > --- a/drivers/soc/imx/gpcv2.c
> > > +++ b/drivers/soc/imx/gpcv2.c
> > > @@ -641,6 +641,7 @@ static int imx_gpcv2_probe(struct platform_device *pdev)
> > >  static const struct of_device_id imx_gpcv2_dt_ids[] = {
> > >       { .compatible = "fsl,imx7d-gpc", .data = &imx7_pgc_domain_data, },
> > >       { .compatible = "fsl,imx8mq-gpc", .data = &imx8m_pgc_domain_data, },
> > > +     { .compatible = "fsl,imx8mm-gpc", .data = &imx8m_pgc_domain_data, },
> >
> > According to the 5.2.5.1 "PGC power domains" chapters in both the i.MX
> > 8M Dual/8M QuadLite/8M Quad and i.MX 8M Mini Applications Processor
> > Reference Manuals (Rev.1), the two SoCs have a different list of power
> > domains:
>
> Shoot.  I needed to go further down in the table.  I stopped after the
> first four.
>
> Sorry for the noise.
>
> adam
> >
> > i.MX8MQ:
> >         PGC_C0
> >         PGC_C1
> >         PGC_C2
> >         PGC_C3
> >         PGC_SCU
> >         PGC_MF
> >         PGC_OTG1
> >         PGC_OTG2
> >         PGC_PCIE
> >         PGC_MIPI
> >         PGC_DDR1
> >         PGC_DDR2
> >         PGC_VPU
> >         PGC_GPU
> >         PGC_HDMI
> >         PGC_DISP
> >         PGC_MIPI_CSI1
> >         PGC_MIPI_CSI2
> >         PGC_PCIE2
> >
> > i.MX8MM:
> >         PGC_C0
> >         PGC_C1
> >         PGC_C2
> >         PGC_C3
> >         PGC_SCU
> >         PGC_NOC
> >         PGC_PCIE
> >         PGC_OTG1
> >         PGC_OTG2
> >         PGC_DDR1
> >         PGC_DISPMIX
> >         GPC_MIPI
> >         PGC_GPUMIX
> >         PGC_GPU_3D
> >         PGC_GPU_2D
> >         PGC_VPUMIX
> >         PGC_VPU_G1
> >         PGC_VPU_G2
> >         PGC_VPU_H1
Philipp,

Thanks for reviewing it and catching my mistake.

I went though the datasheet more thoroughly, and I think I have the
table correct for the i.MX8M Mini.  With that and a small tweak to the
OTG nodes, I was able to use USB OTG1 and OTG2 ports.

I am going to submit a V2 fix tomorrow after I clean it up.  I'll do a
multi-part series where part 1 is the GPC, part 2 will be the OTG
updates, and if I get more peripherals working, I'll add them as
additional parts to the series.

adam
> >
> > regards
> > Philipp
> >