lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <1575543357-31892-1-git-send-email-gkohli@codeaurora.org>
Date:   Thu,  5 Dec 2019 16:25:57 +0530
From:   Gaurav Kohli <gkohli@...eaurora.org>
To:     tglx@...utronix.de, maz@...nel.org
Cc:     linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
        Gaurav Kohli <gkohli@...eaurora.org>
Subject: [PATCH v0] irqchip/gic-v3: Avoid check of lpi configuration for non existent cpu

As per GIC specification, we can configure gic for more no of cpus
then the available cpus in the soc, But this can cause mem abort
while iterating lpi region for non existent cpu as we don't map
redistrubutor region for non-existent cpu.

To avoid this issue, put one more check of valid mpidr.

Signed-off-by: Gaurav Kohli <gkohli@...eaurora.org>

diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
index 1edc993..adc9186 100644
--- a/drivers/irqchip/irq-gic-v3.c
+++ b/drivers/irqchip/irq-gic-v3.c
@@ -766,6 +766,7 @@ static int gic_iterate_rdists(int (*fn)(struct redist_region *, void __iomem *))
 {
 	int ret = -ENODEV;
 	int i;
+	int cpu = 0;
 
 	for (i = 0; i < gic_data.nr_redist_regions; i++) {
 		void __iomem *ptr = gic_data.redist_regions[i].redist_base;
@@ -780,6 +781,7 @@ static int gic_iterate_rdists(int (*fn)(struct redist_region *, void __iomem *))
 		}
 
 		do {
+			cpu++;
 			typer = gic_read_typer(ptr + GICR_TYPER);
 			ret = fn(gic_data.redist_regions + i, ptr);
 			if (!ret)
@@ -795,7 +797,8 @@ static int gic_iterate_rdists(int (*fn)(struct redist_region *, void __iomem *))
 				if (typer & GICR_TYPER_VLPIS)
 					ptr += SZ_64K * 2; /* Skip VLPI_base + reserved page */
 			}
-		} while (!(typer & GICR_TYPER_LAST));
+		} while (!(typer & GICR_TYPER_LAST) &&
+					cpu_logical_map(cpu) != INVALID_HWID);
 	}
 
 	return ret ? -ENODEV : 0;
-- 
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center,
Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ