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Date: Thu, 5 Dec 2019 10:13:41 +0800
From: CK Hu <ck.hu@...iatek.com>
To: Bibby Hsieh <bibby.hsieh@...iatek.com>
CC: David Airlie <airlied@...ux.ie>,
Matthias Brugger <matthias.bgg@...il.com>,
Daniel Vetter <daniel.vetter@...ll.ch>,
<dri-devel@...ts.freedesktop.org>,
<linux-mediatek@...ts.infradead.org>,
Philipp Zabel <p.zabel@...gutronix.de>,
YT Shen <yt.shen@...iatek.com>,
Thierry Reding <thierry.reding@...il.com>,
<linux-arm-kernel@...ts.infradead.org>, <tfiga@...omium.org>,
<drinkcat@...omium.org>, <linux-kernel@...r.kernel.org>,
<srv_heupstream@...iatek.com>
Subject: Re: [PATCH v3 3/6] drm/mediatek: update cursors by using async
atomic update
Hi, Bibby:
On Wed, 2019-12-04 at 17:44 +0800, Bibby Hsieh wrote:
> Support to async updates of cursors by using the new atomic
> interface for that.
>
> Signed-off-by: Bibby Hsieh <bibby.hsieh@...iatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 75 +++++++++++++++++-------
> drivers/gpu/drm/mediatek/mtk_drm_crtc.h | 2 +
> drivers/gpu/drm/mediatek/mtk_drm_plane.c | 50 ++++++++++++++++
> drivers/gpu/drm/mediatek/mtk_drm_plane.h | 2 +
> 4 files changed, 108 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> index 4bc52346093d..92b3b397c6c4 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> @@ -47,6 +47,9 @@ struct mtk_drm_crtc {
> struct mtk_disp_mutex *mutex;
> unsigned int ddp_comp_nr;
> struct mtk_ddp_comp **ddp_comp;
> +
> + /* lock for display hardware access */
> + struct mutex hw_lock;
> };
>
> struct mtk_crtc_state {
> @@ -417,6 +420,41 @@ static void mtk_crtc_ddp_config(struct drm_crtc *crtc)
> }
> }
>
> +static void mtk_drm_crtc_hw_config(struct mtk_drm_crtc *mtk_crtc)
> +{
> + struct drm_crtc *crtc = &mtk_crtc->base;
> + struct mtk_drm_private *priv = crtc->dev->dev_private;
> + unsigned int pending_planes = 0;
> + int i;
> +
> + mutex_lock(&mtk_crtc->hw_lock);
> + for (i = 0; i < mtk_crtc->layer_nr; i++) {
> + struct drm_plane *plane = &mtk_crtc->planes[i];
> + struct mtk_plane_state *plane_state;
> +
> + plane_state = to_mtk_plane_state(plane->state);
> + if (plane_state->pending.dirty) {
> + plane_state->pending.config = true;
> + plane_state->pending.dirty = false;
> + pending_planes |= BIT(i);
> + } else if (plane_state->pending.async_dirty) {
> + plane_state->pending.config = true;
> + plane_state->pending.async_update = false;
> + plane_state->pending.async_dirty = false;
> + pending_planes |= BIT(i);
> + }
I think the async plane break the atomic planes. For example, plane 0,
plane 1, plane 2 are atomic planes and plane 3 is async plane. When
plane 0, plane 1 , plane 2 would be dirty in sequence, and plane 0 get
dirty first, but async plane update before plane 1 get dirty, these code
would apply plane 0 and plane 3, so this would break the atomic.
> + }
> + if (pending_planes)
> + mtk_crtc->pending_planes = true;
> +
> + if (priv->data->shadow_register) {
> + mtk_disp_mutex_acquire(mtk_crtc->mutex);
> + mtk_crtc_ddp_config(crtc);
> + mtk_disp_mutex_release(mtk_crtc->mutex);
> + }
> + mutex_unlock(&mtk_crtc->hw_lock);
> +}
> +
> int mtk_drm_crtc_plane_check(struct drm_crtc *crtc, struct drm_plane *plane,
> struct mtk_plane_state *state)
> {
> @@ -429,6 +467,20 @@ int mtk_drm_crtc_plane_check(struct drm_crtc *crtc, struct drm_plane *plane,
> return 0;
> }
>
> +void mtk_drm_crtc_async_update(struct drm_crtc *crtc, struct drm_plane *plane,
> + struct drm_plane_state *new_state)
> +{
> + struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);
> + const struct drm_plane_helper_funcs *plane_helper_funcs =
> + plane->helper_private;
> +
> + if (!mtk_crtc->enabled)
> + return;
> +
> + plane_helper_funcs->atomic_update(plane, new_state);
> + mtk_drm_crtc_hw_config(mtk_crtc);
> +}
> +
> static void mtk_drm_crtc_atomic_enable(struct drm_crtc *crtc,
> struct drm_crtc_state *old_state)
> {
> @@ -510,34 +562,14 @@ static void mtk_drm_crtc_atomic_flush(struct drm_crtc *crtc,
> struct drm_crtc_state *old_crtc_state)
> {
> struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);
> - struct mtk_drm_private *priv = crtc->dev->dev_private;
> - unsigned int pending_planes = 0;
> int i;
>
> if (mtk_crtc->event)
> mtk_crtc->pending_needs_vblank = true;
> - for (i = 0; i < mtk_crtc->layer_nr; i++) {
> - struct drm_plane *plane = &mtk_crtc->planes[i];
> - struct mtk_plane_state *plane_state;
> -
> - plane_state = to_mtk_plane_state(plane->state);
> - if (plane_state->pending.dirty) {
> - plane_state->pending.config = true;
> - plane_state->pending.dirty = false;
> - pending_planes |= BIT(i);
> - }
> - }
> - if (pending_planes)
> - mtk_crtc->pending_planes = true;
> if (crtc->state->color_mgmt_changed)
> for (i = 0; i < mtk_crtc->ddp_comp_nr; i++)
> mtk_ddp_gamma_set(mtk_crtc->ddp_comp[i], crtc->state);
> -
> - if (priv->data->shadow_register) {
> - mtk_disp_mutex_acquire(mtk_crtc->mutex);
> - mtk_crtc_ddp_config(crtc);
> - mtk_disp_mutex_release(mtk_crtc->mutex);
> - }
> + mtk_drm_crtc_hw_config(mtk_crtc);
> }
>
> static const struct drm_crtc_funcs mtk_crtc_funcs = {
> @@ -729,6 +761,7 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev,
> drm_mode_crtc_set_gamma_size(&mtk_crtc->base, MTK_LUT_SIZE);
> drm_crtc_enable_color_mgmt(&mtk_crtc->base, 0, false, MTK_LUT_SIZE);
> priv->num_pipes++;
> + mutex_init(&mtk_crtc->hw_lock);
>
> return 0;
> }
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.h b/drivers/gpu/drm/mediatek/mtk_drm_crtc.h
> index 6afe1c19557a..a2b4677a451c 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.h
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.h
> @@ -21,5 +21,7 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev,
> unsigned int path_len);
> int mtk_drm_crtc_plane_check(struct drm_crtc *crtc, struct drm_plane *plane,
> struct mtk_plane_state *state);
> +void mtk_drm_crtc_async_update(struct drm_crtc *crtc, struct drm_plane *plane,
> + struct drm_plane_state *plane_state);
>
> #endif /* MTK_DRM_CRTC_H */
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_plane.c b/drivers/gpu/drm/mediatek/mtk_drm_plane.c
> index cd7c97eb7ee6..6bdb42f068fb 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_plane.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_plane.c
> @@ -7,6 +7,7 @@
> #include <drm/drm_atomic.h>
> #include <drm/drm_atomic_helper.h>
> #include <drm/drm_fourcc.h>
> +#include <drm/drm_atomic_uapi.h>
> #include <drm/drm_plane_helper.h>
> #include <drm/drm_gem_framebuffer_helper.h>
>
> @@ -70,6 +71,50 @@ static void mtk_drm_plane_destroy_state(struct drm_plane *plane,
> kfree(to_mtk_plane_state(state));
> }
>
> +static int mtk_plane_atomic_async_check(struct drm_plane *plane,
> + struct drm_plane_state *state)
> +{
> + struct drm_crtc_state *crtc_state;
> +
> + if (plane != state->crtc->cursor)
> + return -EINVAL;
> +
> + if (!plane->state)
> + return -EINVAL;
> +
> + if (!plane->state->fb)
> + return -EINVAL;
> +
> + if (state->state)
> + crtc_state = drm_atomic_get_existing_crtc_state(state->state,
> + state->crtc);
> + else /* Special case for asynchronous cursor updates. */
> + crtc_state = state->crtc->state;
> +
> + return drm_atomic_helper_check_plane_state(plane->state, crtc_state,
> + DRM_PLANE_HELPER_NO_SCALING,
> + DRM_PLANE_HELPER_NO_SCALING,
> + true, true);
> +}
> +
> +static void mtk_plane_atomic_async_update(struct drm_plane *plane,
> + struct drm_plane_state *new_state)
> +{
> + struct mtk_plane_state *state = to_mtk_plane_state(plane->state);
> +
> + plane->state->crtc_x = new_state->crtc_x;
> + plane->state->crtc_y = new_state->crtc_y;
> + plane->state->crtc_h = new_state->crtc_h;
> + plane->state->crtc_w = new_state->crtc_w;
> + plane->state->src_x = new_state->src_x;
> + plane->state->src_y = new_state->src_y;
> + plane->state->src_h = new_state->src_h;
> + plane->state->src_w = new_state->src_w;
> + state->pending.async_update = true;
> +
> + mtk_drm_crtc_async_update(new_state->crtc, plane, new_state);
> +}
> +
> static const struct drm_plane_funcs mtk_plane_funcs = {
> .update_plane = drm_atomic_helper_update_plane,
> .disable_plane = drm_atomic_helper_disable_plane,
> @@ -141,6 +186,9 @@ static void mtk_plane_atomic_update(struct drm_plane *plane,
> state->pending.rotation = plane->state->rotation;
> wmb(); /* Make sure the above parameters are set before update */
> state->pending.dirty = true;
> +
> + if (state->pending.async_update)
> + state->pending.async_dirty = true;
Why do you use two variable to state just one thing?
Regards,
CK
> }
>
> static void mtk_plane_atomic_disable(struct drm_plane *plane,
> @@ -158,6 +206,8 @@ static const struct drm_plane_helper_funcs mtk_plane_helper_funcs = {
> .atomic_check = mtk_plane_atomic_check,
> .atomic_update = mtk_plane_atomic_update,
> .atomic_disable = mtk_plane_atomic_disable,
> + .atomic_async_update = mtk_plane_atomic_async_update,
> + .atomic_async_check = mtk_plane_atomic_async_check,
> };
>
> int mtk_plane_init(struct drm_device *dev, struct drm_plane *plane,
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_plane.h b/drivers/gpu/drm/mediatek/mtk_drm_plane.h
> index 760885e35b27..41882465dd67 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_plane.h
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_plane.h
> @@ -22,6 +22,8 @@ struct mtk_plane_pending_state {
> unsigned int height;
> unsigned int rotation;
> bool dirty;
> + bool async_dirty;
> + bool async_update;
> };
>
> struct mtk_plane_state {
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