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Message-ID: <s2tCh5akte6KmZimjnjJ0dn_zhWfLr_DEXJ6je2DFCUwZwrF9wqS4kPcJ-j1LOtP8rmkjR6oMg58anmztMJMd0e1Dfe8CvtTZudBXRT4gik=@protonmail.com>
Date:   Fri, 06 Dec 2019 16:13:05 +0000
From:   Krzysztof Piecuch <piecuch@...tonmail.com>
To:     Peter Zijlstra <peterz@...radead.org>
Cc:     "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "tglx@...utronix.de" <tglx@...utronix.de>,
        "mingo@...hat.com" <mingo@...hat.com>,
        "bp@...en8.de" <bp@...en8.de>, "hpa@...or.com" <hpa@...or.com>,
        "x86@...nel.org" <x86@...nel.org>,
        "viresh.kumar@...aro.org" <viresh.kumar@...aro.org>,
        "rafael.j.wysocki@...el.com" <rafael.j.wysocki@...el.com>,
        "drake@...lessm.com" <drake@...lessm.com>,
        "malat@...ian.org" <malat@...ian.org>,
        "juri.lelli@...hat.com" <juri.lelli@...hat.com>
Subject: Re: [PATCH] x86/tsc: Don't use cpuid 0x16 leaf to determine cpu speed.

Thank you for your reply.

I experience 2% tsc clock-drift (671s ahead of my local NTP server after 9.5h)
on my machine with Supermicro's Hyperspeed turned on. There's no clock
drift when I turn Hyperspeed off.

As far as I know Hyperspeed increases base clock frequency[1].

That's what CPUID says about my overclocked Intel Xeon Gold 6146:

   Time Stamp Counter/Core Crystal Clock Information (0x15):
      TSC/clock ratio = 256/2
      nominal core crystal clock = 0 Hz
   Processor Frequency Information (0x16):
      Core Base Frequency (MHz) = 0xc80 (3200)
      Core Maximum Frequency (MHz) = 0x1068 (4200)
      Bus (Reference) Frequency (MHz) = 0x64 (100)

tsc_refine_calibration_work never corrects the early calibration
because it calculates a tsc frequency beyond 1% tolerance.

I've bumped the tsc_refine_calibration_work's tolerance to 3% and made it work:

Hyperspeed:
[    8.571471] tsc: Refined TSC clocksource calibration: 3264.012 MHz
No hyperspeed:
[    8.506009] tsc: Refined TSC clocksource calibration: 3200.013 MHz

Increasing the tolerance to 3% would work in my case but apparently some
servers can increase the base-clock frequency to 6%. [2]
At this point in order to completely eliminate this bug we would need to
significantly increase the tolerance which might introduce other bugs.

[1]: https://www.supermicro.com/support/faqs/faq.cfm?faq=21337
[2]: https://www.servethehome.com/supermicro-hyper-speed-server-overclocking-bios/

Kind regards,
Krzysztof Piecuch

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