linux-kernel - Re: [PATCH v3 06/15] clk: tegra: Remove tegra_pmc_clk

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <f8188f0d-ec7e-7d4a-f977-16273b594838@gmail.com>
Date:   Sun, 8 Dec 2019 02:24:52 +0300
From:   Dmitry Osipenko <digetx@...il.com>
To:     Sowjanya Komatineni <skomatineni@...dia.com>,
        thierry.reding@...il.com, jonathanh@...dia.com,
        mperttunen@...dia.com, gregkh@...uxfoundation.org,
        sboyd@...nel.org, tglx@...utronix.de, robh+dt@...nel.org,
        mark.rutland@....com
Cc:     allison@...utok.net, pdeschrijver@...dia.com, pgaikwad@...dia.com,
        mturquette@...libre.com, horms+renesas@...ge.net.au,
        Jisheng.Zhang@...aptics.com, krzk@...nel.org, arnd@...db.de,
        spujar@...dia.com, josephl@...dia.com, vidyas@...dia.com,
        daniel.lezcano@...aro.org, mmaddireddy@...dia.com,
        markz@...dia.com, devicetree@...r.kernel.org,
        linux-clk@...r.kernel.org, linux-tegra@...r.kernel.org,
        linux-kernel@...r.kernel.org, lgirdwood@...il.com,
        broonie@...nel.org, perex@...ex.cz, tiwai@...e.com,
        alexios.zavras@...el.com, alsa-devel@...a-project.org
Subject: Re: [PATCH v3 06/15] clk: tegra: Remove tegra_pmc_clk_init along with
 clk ids

07.12.2019 22:35, Sowjanya Komatineni пишет:
> 
> On 12/7/19 7:04 AM, Dmitry Osipenko wrote:
>> 07.12.2019 17:43, Dmitry Osipenko пишет:
>>> 07.12.2019 17:33, Dmitry Osipenko пишет:
>>>> 06.12.2019 05:48, Sowjanya Komatineni пишет:
>>>>> Current Tegra clock driver registers PMC clocks clk_out_1, clk_out_2,
>>>>> clk_out_3 and blink output in tegra_pmc_init() which does direct Tegra
>>>>> PMC access during clk_ops and these PMC register read and write access
>>>>> will not happen when PMC is in secure mode.
>>>>>
>>>>> Any direct PMC register access from non-secure world will not go
>>>>> through and all the PMC clocks and blink control are done in Tegra PMC
>>>>> driver with PMC as clock provider.
>>>>>
>>>>> This patch removes tegra_pmc_clk_init along with corresponding clk ids
>>>>> from Tegra clock driver.
>>>>>
>>>>> Signed-off-by: Sowjanya Komatineni <skomatineni@...dia.com>
>>>>> ---
>>>> [snip]
>>>>
>>>>> @@ -1230,9 +1222,6 @@ static struct tegra_clk_init_table
>>>>> init_table[] __initdata = {
>>>>>       { TEGRA30_CLK_PLL_A, TEGRA30_CLK_CLK_MAX, 564480000, 1 },
>>>>>       { TEGRA30_CLK_PLL_A_OUT0, TEGRA30_CLK_CLK_MAX, 11289600, 1 },
>>>>>       { TEGRA30_CLK_EXTERN1, TEGRA30_CLK_PLL_A_OUT0, 0, 1 },
>>>> Perhaps these clocks do not need to be always-enabled?
>>>>
>>>> [snip]
>>>>
>>> Also, EXTERN1 parent configuration should be moved to the audio
>>> driver/device-tree as well.
>> Ah, I missed that it's done in the patch #10.
> Yes its done in Patch#10
>>
>>> Maybe it even makes sense to move the whole configuration, including
>>> PLLA. I don't see why clk driver need to do something for the audio
>>> driver.
> 
> Current ASoC driver already takes care of PLLA rate and enables.
> 
> So PLLA init can be removed from clock driver too. I didn't went through
> complete audio driver to be confident to remove this.
> 
> But PLLA is needed for i2s clock also and currently I2S driver takes
> care of only I2S clock rate using PLLA as parent set by clock driver and
> clock driver enables PLLA earlier to have it ready by the time both I2S
> driver and ASoC driver .
I2S could use assigned-clocks, but probably it's not really necessary
and predefined configuration in the clk driver is good enough.

At least PLLA doesn't need to be always-enabled since audio drivers
enable it when necessary.