linux-kernel - Re: [PATCH] dt-bindings: reset: meson8b: fix duplicate reset IDs

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <7h5ziprv9m.fsf@baylibre.com>
Date:   Mon, 09 Dec 2019 14:25:57 -0800
From:   Kevin Hilman <khilman@...libre.com>
To:     Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
        p.zabel@...gutronix.de, linux-amlogic@...ts.infradead.org
Cc:     linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        devicetree@...r.kernel.org, narmstrong@...libre.com,
        Martin Blumenstingl <martin.blumenstingl@...glemail.com>
Subject: Re: [PATCH] dt-bindings: reset: meson8b: fix duplicate reset IDs

Martin Blumenstingl <martin.blumenstingl@...glemail.com> writes:

> According to the public S805 datasheet the RESET2 register uses the
> following bits for the PIC_DC, PSC and NAND reset lines:
> - PIC_DC is at bit 3 (meaning: RESET_VD_RMEM + 3)
> - PSC is at bit 4 (meaning: RESET_VD_RMEM + 4)
> - NAND is at bit 5 (meaning: RESET_VD_RMEM + 4)
>
> Update the reset IDs of these three reset lines so they don't conflict
> with PIC_DC and map to the actual hardware reset lines.
>
> Fixes: 79795e20a184eb ("dt-bindings: reset: Add bindings for the Meson SoC Reset Controller")
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@...glemail.com>

Queued as a fix for v5.5-rc,

Thanks,

Kevin