lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAJMQK-hNSF-Vu4CfTKiCUdBRmaONf=Lp3NN0-nFor6mxY1seJg@mail.gmail.com>
Date:   Mon, 9 Dec 2019 23:09:34 +0800
From:   Hsin-Yi Wang <hsinyi@...omium.org>
To:     Laurent Pinchart <laurent.pinchart@...asonboard.com>
Cc:     dri-devel@...ts.freedesktop.org, David Airlie <airlied@...ux.ie>,
        Daniel Vetter <daniel@...ll.ch>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Nicolas Boichat <drinkcat@...omium.org>,
        Devicetree List <devicetree@...r.kernel.org>,
        lkml <linux-kernel@...r.kernel.org>,
        Andrzej Hajda <a.hajda@...sung.com>,
        Neil Armstrong <narmstrong@...libre.com>,
        Jonas Karlman <jonas@...boo.se>,
        Jernej Skrabec <jernej.skrabec@...l.net>,
        Archit Taneja <architt@...eaurora.org>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Enric Balletbo i Serra <enric.balletbo@...labora.com>,
        Matthias Brugger <mbrugger@...e.com>,
        Russell King <rmk+kernel@....linux.org.uk>
Subject: Re: [PATCH RESEND 3/4] dt-bindings: drm/bridge: analogix-anx78xx:
 support bypass GPIO

On Mon, Dec 9, 2019 at 10:55 PM Laurent Pinchart
<laurent.pinchart@...asonboard.com> wrote:
>
> Hi Hsin-Yi,
>
> Thank you for the patch.
>
> On Mon, Dec 09, 2019 at 10:50:15PM +0800, Hsin-Yi Wang wrote:
> > Support optional feature: bypass GPIO.
> >
> > Some SoC (eg. mt8173) have a hardware mux that connects to 2 ports:
> > anx7688 and hdmi. When the GPIO is active, the bridge is bypassed.
>
> This doesn't look like the right place to fix this, as the mux is
> unrelated to the bridge. You would have to duplicate this logic in every
> bridge driver otherwise.
>
> Could you describe the hardware topology in a bit more details ? I can
> then try to advise on how to best support it.
>
Hi Laurent,

The mt8173 layout is:

MT8173 HDMI bridge-- hardware mux --- HDMI
                                                   |
                                                    ------------ anx7688
There's a hardware mux that takes mt8173 hdmi as input and has 2
output port: native hdmi and anx7688 bridge.
If gpio is active, we would like it to go to HDMI.

Previous approach is to make hardware mux a generic gpio mux bridge,
but this is probably a very rare use case that is only for
mt8173.(https://lore.kernel.org/lkml/57723AD2.8020806@codeaurora.org/)
We merge the mux and anx7688 to a single bridge and leave this as an
optional feature in this time.

Thanks.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ