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Message-ID: <CAMuHMdU2atxUFCMFJNsgVWak+Z1YcTm8BrKtk66cpXu16K+_tA@mail.gmail.com>
Date: Wed, 11 Dec 2019 16:32:36 +0100
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Rob Herring <robh+dt@...nel.org>
Cc: Thomas Gleixner <tglx@...utronix.de>,
Jason Cooper <jason@...edaemon.net>,
Marc Zyngier <marc.zyngier@....com>,
Mark Rutland <mark.rutland@....com>,
Simon Horman <horms@...ge.net.au>,
Magnus Damm <magnus.damm@...il.com>,
Chris Brandt <chris.brandt@...esas.com>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Geert Uytterhoeven <geert+renesas@...der.be>
Subject: Re: [PATCH v3 1/5] dt-bindings: interrupt-controller: Add Renesas
RZ/A1 Interrupt Controller
Hi Rob,
On Thu, May 2, 2019 at 2:32 PM Geert Uytterhoeven
<geert+renesas@...der.be> wrote:
> Add DT bindings for the Renesas RZ/A1 Interrupt Controller.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@...der.be>
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,rza1-irqc.txt
> @@ -0,0 +1,43 @@
> +DT bindings for the Renesas RZ/A1 Interrupt Controller
> +
> +The RZ/A1 Interrupt Controller is a front-end for the GIC found on Renesas
> +RZ/A1 and RZ/A2 SoCs:
> + - IRQ sense select for 8 external interrupts, 1:1-mapped to 8 GIC SPI
> + interrupts,
> + - NMI edge select.
> +
> +Required properties:
> + - compatible: Must be "renesas,<soctype>-irqc", and "renesas,rza1-irqc" as
> + fallback.
> + Examples with soctypes are:
> + - "renesas,r7s72100-irqc" (RZ/A1H)
> + - "renesas,r7s9210-irqc" (RZ/A2M)
> + - #interrupt-cells: Must be 2 (an interrupt index and flags, as defined
> + in interrupts.txt in this directory)
> + - #address-cells: Must be zero
> + - interrupt-controller: Marks the device as an interrupt controller
> + - reg: Base address and length of the memory resource used by the interrupt
> + controller
> + - interrupt-map: Specifies the mapping from external interrupts to GIC
> + interrupts
> + - interrupt-map-mask: Must be <7 0>
> +
> +Example:
> +
> + irqc: interrupt-controller@...ef800 {
> + compatible = "renesas,r7s72100-irqc", "renesas,rza1-irqc";
> + #interrupt-cells = <2>;
> + #address-cells = <0>;
> + interrupt-controller;
> + reg = <0xfcfef800 0x6>;
> + interrupt-map =
> + <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
> + <1 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
> + <2 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
> + <3 0 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
> + <4 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
> + <5 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
> + <6 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
> + <7 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-map-mask = <7 0>;
> + };
"make dtbs_check" does not like this example:
arch/arm/boot/dts/r7s72100-rskrza1.dt.yaml:
interrupt-controller@...ef800: {'compatible':
['renesas,r7s72100-irqc', 'renesas,rza1-irqc'], '#interrupt-cells':
[[2]], '#address-cells': [[0]], 'interrupt-controller': True, 'reg':
[[4244568064, 6]], 'interrupt-map': [[0, 0, 3, 0, 0, 4], [1, 0, 3, 0,
1, 4], [2, 0, 3, 0, 2, 4], [3, 0, 3, 0, 3, 4], [4, 0, 3, 0, 4, 4], [5,
0, 3, 0, 5, 4], [6, 0, 3, 0, 6, 4], [7, 0, 3, 0, 7, 4]],
'interrupt-map-mask': [[7, 0]], 'phandle': [[27]], '$nodename':
['interrupt-controller@...ef800']} is valid under each of {'required':
['interrupt-map']}, {'required': ['interrupt-controller']}
{'oneOf': [{'required': ['interrupt-controller']},
{'required': ['interrupt-map']}]}
as it considers interrupt-controller and interrupt-map mutually-exclusive.
This comes from
dt-schema/meta-schemas/interrupts.yaml:
dependencies:
interrupt-map: ['#interrupt-cells', 'interrupt-map-mask']
'#interrupt-cells':
oneOf:
- required:
- interrupt-controller
- required:
- interrupt-map
and/or dt-schema/schemas/interrupt-controller.yaml:
dependencies:
interrupt-controller: ['#interrupt-cells']
interrupt-map: ['#interrupt-cells', 'interrupt-map-mask']
"#interrupt-cells":
oneOf:
- required:
- interrupt-controller
- required:
- interrupt-map
Removing the "interrupt-controller" property fixes the warning, but
impacts the logic in of_irq_parse_raw().
Is there something wrong with the base schema?
Or perhaps this will just be be fixed by converting renesas,rza1-irqc.txt
to yaml?
Thanks!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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