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Message-ID: <20191211161405.GA5722@linux.intel.com>
Date: Wed, 11 Dec 2019 08:14:05 -0800
From: Sean Christopherson <sean.j.christopherson@...el.com>
To: "Kang, Luwei" <luwei.kang@...el.com>
Cc: Paolo Bonzini <pbonzini@...hat.com>,
Vitaly Kuznetsov <vkuznets@...hat.com>,
Wanpeng Li <wanpengli@...cent.com>,
Jim Mattson <jmattson@...gle.com>,
Joerg Roedel <joro@...tes.org>,
"kvm@...r.kernel.org" <kvm@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Chao Peng <chao.p.peng@...ux.intel.com>
Subject: Re: [PATCH 1/2] KVM: VMX: Add non-canonical check on writes to RTIT
address MSRs
On Tue, Dec 10, 2019 at 06:16:35PM -0800, Kang, Luwei wrote:
> > diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index
> > 51e3b27f90ed..9aa2006dbe04 100644 --- a/arch/x86/kvm/vmx/vmx.c +++
> > b/arch/x86/kvm/vmx/vmx.c @@ -2152,6 +2152,8 @@ static int
> > vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) (index >= 2 *
> > intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_num_address_ranges)))
> > return 1; + if (is_noncanonical_address(data, vcpu)) +
> > return 1;
>
> Is this for live migrate a VM with 5 level page table to the VM with 4 level
> page table?
This is orthogonal to live migration or 5-level paging. Unless I'm missing
something, KVM simply fails to validate the incoming address.
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