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Message-ID: <4faef0e9-72aa-9328-9110-fc67b2580f91@amd.com>
Date:   Wed, 11 Dec 2019 14:48:29 -0600
From:   Tom Lendacky <thomas.lendacky@....com>
To:     Paolo Bonzini <pbonzini@...hat.com>,
        "Huang, Kai" <kai.huang@...el.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "kvm@...r.kernel.org" <kvm@...r.kernel.org>
Cc:     "Christopherson, Sean J" <sean.j.christopherson@...el.com>,
        "stable@...r.kernel.org" <stable@...r.kernel.org>
Subject: Re: [PATCH v2] KVM: x86: use CPUID to locate host page table reserved
 bits

On 12/11/19 3:07 AM, Paolo Bonzini wrote:
> On 11/12/19 01:11, Huang, Kai wrote:
>>> kvm_get_shadow_phys_bits() must be conservative in that:
>>>
>>> 1) if a bit is reserved it _can_ return a value higher than its index
>>>
>>> 2) if a bit is used by the processor (for physical address or anything
>>> else) it _must_ return a value higher than its index.
>>>
>>> In the SEV case we're not obeying (2), because the function returns 43
>>> when the C bit is bit 47.  The patch fixes that.
>> Could we guarantee that C-bit is always below bits reported by CPUID?
> 
> That's a question for AMD. :)  The C bit can move (and probably will,
> otherwise they wouldn't have bothered adding it to CPUID) in future
> generations of the processor.

Right, there's no way to guarantee that it is always below bits reported
by CPUID. As Paolo stated, the position is reported by CPUID so that it
can easily move and be accounted for programmatically.

Thanks,
Tom

> 
> Paolo
> 

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