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Date: Thu, 12 Dec 2019 11:35:43 -0800
From: Douglas Anderson <dianders@...omium.org>
To: Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>
Cc: Vinod Koul <vkoul@...nel.org>, Kiran Gunda <kgunda@...eaurora.org>,
Rajendra Nayak <rnayak@...eaurora.org>, swboyd@...omium.org,
mka@...omium.org, Sandeep Maheswaram <sanm@...eaurora.org>,
Amit Kucheria <amit.kucheria@...aro.org>,
Maulik Shah <mkshah@...eaurora.org>,
Douglas Anderson <dianders@...omium.org>,
Taniya Das <tdas@...eaurora.org>,
linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>
Subject: [PATCH 7/7] arm64: dts: qcom: sc7180: Use 'ranges' in arm,armv7-timer-mem node
Running `make dtbs_check` yells:
arch/arm64/boot/dts/qcom/sc7180-idp.dt.yaml: timer@...20000: #size-cells:0:0: 1 was expected
It appears that someone was trying to assert the fact that sub-nodes
describing frames would never have a size that's more than 32-bits
big. That's certainly true in the case of sc7180.
I guess this is a hint that it's time to do the thing that nobody
seems to do but that "writing-bindings.txt" says we should all do.
Specifically it says: "DO use non-empty 'ranges' to limit the size of
child buses/devices". That means we should probably limit the
I believe that this patch is the way to do it and there should be no
bad side effects here. I believe that since we're far enough down
(not trying to describe an actual device, just some sub-pieces) that
this won't cause us to run into the problems that caused us to
increase the soc-level #address-cells and #size-cells to 2 in sdm845
in commit bede7d2dc8f3 ("arm64: dts: qcom: sdm845: Increase address
and size cells for soc").
I can at least confirm that "arch_mem_timer" seems to keep getting
interrupts in "/proc/interrupts" after this change.
Fixes: 90db71e48070 ("arm64: dts: sc7180: Add minimal dts/dtsi files for SC7180 soc")
Signed-off-by: Douglas Anderson <dianders@...omium.org>
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 36 ++++++++++++++--------------
1 file changed, 18 insertions(+), 18 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index c671f0719d42..336cf65bdcc2 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -1206,59 +1206,59 @@ watchdog@...10000 {
};
timer@...20000{
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 0x17c21000 0x10000>;
compatible = "arm,armv7-timer-mem";
reg = <0 0x17c20000 0 0x1000>;
- frame@...21000 {
+ frame@0 {
frame-number = <0>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0 0x17c21000 0 0x1000>,
- <0 0x17c22000 0 0x1000>;
+ reg = <0x0000 0x1000>,
+ <0x1000 0x1000>;
};
- frame@...23000 {
+ frame@...0 {
frame-number = <1>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0 0x17c23000 0 0x1000>;
+ reg = <0x2000 0x1000>;
status = "disabled";
};
- frame@...25000 {
+ frame@...0 {
frame-number = <2>;
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0 0x17c25000 0 0x1000>;
+ reg = <0x4000 0x1000>;
status = "disabled";
};
- frame@...27000 {
+ frame@...0 {
frame-number = <3>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0 0x17c27000 0 0x1000>;
+ reg = <0x6000 0x1000>;
status = "disabled";
};
- frame@...29000 {
+ frame@...0 {
frame-number = <4>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0 0x17c29000 0 0x1000>;
+ reg = <0x8000 0x1000>;
status = "disabled";
};
- frame@...2b000 {
+ frame@...0 {
frame-number = <5>;
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0 0x17c2b000 0 0x1000>;
+ reg = <0xa000 0x1000>;
status = "disabled";
};
- frame@...2d000 {
+ frame@...0 {
frame-number = <6>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0 0x17c2d000 0 0x1000>;
+ reg = <0xc000 0x1000>;
status = "disabled";
};
};
--
2.24.1.735.g03f4e72817-goog
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