linux-kernel - Re: [PATCH v3 03/15] soc: tegra: Add Tegra PMC clock registrations into PMC driver

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Date:   Thu, 12 Dec 2019 04:43:53 +0300
From:   Dmitry Osipenko <digetx@...il.com>
To:     Peter De Schrijver <pdeschrijver@...dia.com>
Cc:     Sowjanya Komatineni <skomatineni@...dia.com>,
        thierry.reding@...il.com, jonathanh@...dia.com,
        mperttunen@...dia.com, sboyd@...nel.org,
        gregkh@...uxfoundation.org, tglx@...utronix.de, robh+dt@...nel.org,
        mark.rutland@....com, allison@...utok.net, pgaikwad@...dia.com,
        mturquette@...libre.com, horms+renesas@...ge.net.au,
        Jisheng.Zhang@...aptics.com, krzk@...nel.org, arnd@...db.de,
        spujar@...dia.com, josephl@...dia.com, vidyas@...dia.com,
        daniel.lezcano@...aro.org, mmaddireddy@...dia.com,
        markz@...dia.com, devicetree@...r.kernel.org,
        linux-clk@...r.kernel.org, linux-tegra@...r.kernel.org,
        linux-kernel@...r.kernel.org, lgirdwood@...il.com,
        broonie@...nel.org, perex@...ex.cz, tiwai@...e.com,
        alexios.zavras@...el.com, alsa-devel@...a-project.org
Subject: Re: [PATCH v3 03/15] soc: tegra: Add Tegra PMC clock registrations
 into PMC driver

11.12.2019 18:10, Peter De Schrijver пишет:
> On Tue, Dec 10, 2019 at 08:41:56PM +0300, Dmitry Osipenko wrote:
> 
> ..
> 
>>>
>>> PMC clock gate is based on the state of CLKx_ACCEPT_REQ and FORCE_EN
>>> like explained above.
>>>
>>> CLKx_ACCEPT_REQ is 0 default and FORCE_EN acts as gate to enable/disable
>>> EXTPERIPH clock output to PMC CLK_OUT_1/2/3.
>>
>> [and to enable OSC as well]
>>
>>> So I believe we need to register as MUX and Gate rather than as a single
>>> clock. Please confirm.
>>
>> 1. The force-enabling is applied to both OSC and EXTERN sources of
>> PMC_CLK_OUT_x by PMC at once.
>>
>> 2. Both of PMC's force-enabling and OSC/EXTERN selection is internal to PMC.
>>
>> Should be better to define it as a single "pmc_clk_out_x". I don't see
>> any good reasons for differentiating PMC's Gate from the MUX, it's a
>> single hardware unit from a point of view of the rest of the system.
>>
>> Peter, do you have any objections?
> 
> The reason to have separate gate and mux clocks, is to preserve compatibility
> with existing users.
> Otherwise the current users would need to figure out if there's a
> single clock or 2 clocks to configure. I don't think adding that code in
> each user is worth it only to have a sligthly nicer modelling of the
> hardware.

Could you please clarify what do you mean by the "existing users"?
AFAIK, nothing in kernel uses mux clocks.