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Message-Id: <20191213021839.23517-2-yinbo.zhu@nxp.com>
Date: Fri, 13 Dec 2019 10:18:39 +0800
From: Yinbo Zhu <yinbo.zhu@....com>
To: Shawn Guo <shawnguo@...nel.org>, Li Yang <leoyang.li@....com>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>
Cc: yinbo.zhu@....com, xiaobo.xie@....com, jiafei.pan@....com,
linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [PATCH v2 2/2] arm64: dts: ls1028a: fix little-big endian issue for dcfg
dcfg use little endian that SoC register value will be correct
Signed-off-by: Yinbo Zhu <yinbo.zhu@....com>
Acked-by: Shawn Guo <shawnguo@...nel.org>
Acked-by: Yangbo Lu <yangbo.lu@....com>
---
Change in v2:
Add Acked-by
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index 8e8a77eb596a..8b28fda2ca20 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -175,7 +175,7 @@
dcfg: syscon@...0000 {
compatible = "fsl,ls1028a-dcfg", "syscon";
reg = <0x0 0x1e00000 0x0 0x10000>;
- big-endian;
+ little-endian;
};
scfg: syscon@...0000 {
--
2.17.1
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