linux-kernel - Re: [PATCH RFC 3/8] dt-bindings: display: add Unisoc's dpu bindings

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Date:   Fri, 13 Dec 2019 10:44:09 +0100
From:   Maxime Ripard <maxime@...no.tech>
To:     Kevin Tang <kevin3.tang@...il.com>
Cc:     airlied@...ux.ie, daniel@...ll.ch, orsonzhai@...il.com,
        dri-devel@...ts.freedesktop.org, linux-kernel@...r.kernel.org,
        zhang.lyra@...il.com, baolin.wang@...aro.org
Subject: Re: [PATCH RFC 3/8] dt-bindings: display: add Unisoc's dpu bindings

Hi,

On Tue, Dec 10, 2019 at 04:36:30PM +0800, Kevin Tang wrote:
> From: Kevin Tang <kevin.tang@...soc.com>
>
> DPU (Display Processor Unit) is the Display Controller for the Unisoc SoCs
> which transfers the image data from a video memory buffer to an internal
> LCD interface.
>
> Cc: Orson Zhai <orsonzhai@...il.com>
> Cc: Baolin Wang <baolin.wang@...aro.org>
> Cc: Chunyan Zhang <zhang.lyra@...il.com>
> Signed-off-by: Kevin Tang <kevin.tang@...soc.com>
> ---
>  .../devicetree/bindings/display/sprd/dpu.txt       | 55 ++++++++++++++++++++++
>  1 file changed, 55 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/display/sprd/dpu.txt
>
> diff --git a/Documentation/devicetree/bindings/display/sprd/dpu.txt b/Documentation/devicetree/bindings/display/sprd/dpu.txt
> new file mode 100644
> index 0000000..25cbf8e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/sprd/dpu.txt
> @@ -0,0 +1,55 @@
> +Unisoc SoC Display Processor Unit (DPU)
> +============================================================================
> +
> +DPU (Display Processor Unit) is the Display Controller for the Unisoc SoCs
> +which transfers the image data from a video memory buffer to an internal
> +LCD interface.
> +
> +Required properties:
> +  - compatible: value should be "sprd,display-processor";
> +  - reg: physical base address and length of the DPU registers set.
> +  - interrupts: the interrupt signal from DPU.
> +  - clocks: must include clock specifiers corresponding to entries in the
> +	    clock-names property.
> +  - clock-names: list of clock names sorted in the same order as the clocks
> +                 property.

Same story, this should be a YAML schemas, but here you should
describe what the expected clock-names are, and what clock they
represent.

> +  - dma-coherent: with this property, the dpu driver can allocate large and
> +		  continuous memorys.
> +  - port: a port node with endpoint definitions as defined in document [1].

So only one? Connected to what?

Maxime

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