[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20191215210153.1449067-2-martin.blumenstingl@googlemail.com>
Date: Sun, 15 Dec 2019 22:01:53 +0100
From: Martin Blumenstingl <martin.blumenstingl@...glemail.com>
To: linux-amlogic@...ts.infradead.org, jbrunet@...libre.com,
narmstrong@...libre.com
Cc: mturquette@...libre.com, sboyd@...nel.org,
linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org,
Martin Blumenstingl <martin.blumenstingl@...glemail.com>
Subject: [PATCH 1/1] clk: meson: meson8b: make the CCF use the glitch-free "mali" mux
The Mali clock tree should not be updated while the clock is running.
Enforce this by setting CLK_SET_RATE_GATE on the "mali_0" and "mali_1"
gates. This makes the CCF switch to the "mali_1" tree when "mali_0" is
currently active and vice versa which is exactly what the vendor driver
does when updating the frequency of the mali clock.
This fixes a potential hang when changing the GPU frequency at runtime.
Fixes: 74e1f2521f16ff ("clk: meson: meson8b: add the GPU clock tree")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@...glemail.com>
---
drivers/clk/meson/meson8b.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c
index 3408297bff65..6b13084eebf5 100644
--- a/drivers/clk/meson/meson8b.c
+++ b/drivers/clk/meson/meson8b.c
@@ -1838,7 +1838,7 @@ static struct clk_regmap meson8b_mali_0 = {
&meson8b_mali_0_div.hw
},
.num_parents = 1,
- .flags = CLK_SET_RATE_PARENT,
+ .flags = CLK_SET_RATE_GATE | CLK_SET_RATE_PARENT,
},
};
@@ -1893,7 +1893,7 @@ static struct clk_regmap meson8b_mali_1 = {
&meson8b_mali_1_div.hw
},
.num_parents = 1,
- .flags = CLK_SET_RATE_PARENT,
+ .flags = CLK_SET_RATE_GATE | CLK_SET_RATE_PARENT,
},
};
--
2.24.1
Powered by blists - more mailing lists