linux-kernel - [PATCH 4.14 028/267] clk: sunxi-ng: a64: Fix gate bit of DSI DPHY

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Message-Id: <20191216174851.985963465@linuxfoundation.org>
Date:   Mon, 16 Dec 2019 18:45:54 +0100
From:   Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To:     linux-kernel@...r.kernel.org
Cc:     Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        stable@...r.kernel.org, Jagan Teki <jagan@...rulasolutions.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Maxime Ripard <maxime.ripard@...tlin.com>,
        Sasha Levin <sashal@...nel.org>
Subject: [PATCH 4.14 028/267] clk: sunxi-ng: a64: Fix gate bit of DSI DPHY

From: Jagan Teki <jagan@...rulasolutions.com>

[ Upstream commit ee678706e46d0d185c27cc214ad97828e0643159 ]

DSI DPHY gate bit on MIPI DSI clock register is bit 15
not bit 30.

Signed-off-by: Jagan Teki <jagan@...rulasolutions.com>
Acked-by: Stephen Boyd <sboyd@...nel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@...tlin.com>
Signed-off-by: Sasha Levin <sashal@...nel.org>
---
 drivers/clk/sunxi-ng/ccu-sun50i-a64.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
index 36a30a3cfad71..eaafc038368f5 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
@@ -565,7 +565,7 @@ static const char * const dsi_dphy_parents[] = { "pll-video0", "pll-periph0" };
 static const u8 dsi_dphy_table[] = { 0, 2, };
 static SUNXI_CCU_M_WITH_MUX_TABLE_GATE(dsi_dphy_clk, "dsi-dphy",
 				       dsi_dphy_parents, dsi_dphy_table,
-				       0x168, 0, 4, 8, 2, BIT(31), CLK_SET_RATE_PARENT);
+				       0x168, 0, 4, 8, 2, BIT(15), CLK_SET_RATE_PARENT);
 
 static SUNXI_CCU_M_WITH_GATE(gpu_clk, "gpu", "pll-gpu",
 			     0x1a0, 0, 3, BIT(31), CLK_SET_RATE_PARENT);
-- 
2.20.1