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Date: Mon, 16 Dec 2019 15:26:19 +0800
From: Nicolas Boichat <drinkcat@...omium.org>
To: Weiyi Lu <weiyi.lu@...iatek.com>
Cc: Matthias Brugger <matthias.bgg@...il.com>,
Rob Herring <robh@...nel.org>,
James Liao <jamesjj.liao@...iatek.com>,
Fan Chen <fan.chen@...iatek.com>,
linux-arm Mailing List <linux-arm-kernel@...ts.infradead.org>,
lkml <linux-kernel@...r.kernel.org>,
"moderated list:ARM/Mediatek SoC support"
<linux-mediatek@...ts.infradead.org>,
srv_heupstream <srv_heupstream@...iatek.com>,
Yong Wu <yong.wu@...iatek.com>
Subject: Re: [PATCH v9 5/9] soc: mediatek: Add subsys clock control for bus protection
On Tue, Dec 10, 2019 at 2:47 PM Weiyi Lu <weiyi.lu@...iatek.com> wrote:
>
> Add subsys CG control flow before/after the bus protect control
> due to bus protection need SMI bus relative CGs enabled to feedback
> its ack.
>
> Signed-off-by: Weiyi Lu <weiyi.lu@...iatek.com>
I'm not a clock expert but this one looks ok.
Reviewed-by: Nicolas Boichat <drinkcat@...omium.org>
> ---
> drivers/soc/mediatek/mtk-scpsys.c | 72 +++++++++++++++++++++++++++++++++++++--
> 1 file changed, 70 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/soc/mediatek/mtk-scpsys.c b/drivers/soc/mediatek/mtk-scpsys.c
> index 466bb749..2bbf907 100644
> --- a/drivers/soc/mediatek/mtk-scpsys.c
> +++ b/drivers/soc/mediatek/mtk-scpsys.c
> @@ -108,6 +108,7 @@ enum clk_id {
> };
>
> #define MAX_CLKS 3
> +#define MAX_SUBSYS_CLKS 10
>
> /**
> * struct scp_domain_data - scp domain data for power on/off flow
> @@ -120,6 +121,8 @@ enum clk_id {
> * @clk_id: The basic clocks required by this power domain.
> * @basic_clk_id: provide the same purpose with field "clk_id"
> * by declaring basic clock prefix name rather than clk_id.
> + * @subsys_clk_prefix: The prefix name of the clocks need to be enabled
> + * before releasing bus protection.
> * @caps: The flag for active wake-up action.
> * @bp_table: The mask table for multiple step bus protection.
> */
> @@ -132,6 +135,7 @@ struct scp_domain_data {
> u32 bus_prot_mask;
> enum clk_id clk_id[MAX_CLKS];
> const char *basic_clk_id[MAX_CLKS];
> + const char *subsys_clk_prefix;
> u8 caps;
> struct bus_prot bp_table[MAX_STEPS];
> };
> @@ -142,6 +146,7 @@ struct scp_domain {
> struct generic_pm_domain genpd;
> struct scp *scp;
> struct clk *clk[MAX_CLKS];
> + struct clk *subsys_clk[MAX_SUBSYS_CLKS];
> const struct scp_domain_data *data;
> struct regulator *supply;
> };
> @@ -349,16 +354,22 @@ static int scpsys_power_on(struct generic_pm_domain *genpd)
> val |= PWR_RST_B_BIT;
> writel(val, ctl_addr);
>
> - ret = scpsys_sram_enable(scpd, ctl_addr);
> + ret = scpsys_clk_enable(scpd->subsys_clk, MAX_SUBSYS_CLKS);
> if (ret < 0)
> goto err_pwr_ack;
>
> + ret = scpsys_sram_enable(scpd, ctl_addr);
> + if (ret < 0)
> + goto err_sram;
> +
> ret = scpsys_bus_protect_disable(scpd);
> if (ret < 0)
> - goto err_pwr_ack;
> + goto err_sram;
>
> return 0;
>
> +err_sram:
> + scpsys_clk_disable(scpd->subsys_clk, MAX_SUBSYS_CLKS);
> err_pwr_ack:
> scpsys_clk_disable(scpd->clk, MAX_CLKS);
> err_clk:
> @@ -385,6 +396,8 @@ static int scpsys_power_off(struct generic_pm_domain *genpd)
> if (ret < 0)
> goto out;
>
> + scpsys_clk_disable(scpd->subsys_clk, MAX_SUBSYS_CLKS);
> +
> /* subsys power off */
> val = readl(ctl_addr);
> val |= PWR_ISO_BIT;
> @@ -422,6 +435,48 @@ static int scpsys_power_off(struct generic_pm_domain *genpd)
> return ret;
> }
>
> +static int init_subsys_clks(struct platform_device *pdev,
> + const char *prefix, struct clk **clk)
> +{
> + struct device_node *node = pdev->dev.of_node;
> + u32 prefix_len, sub_clk_cnt = 0;
> + struct property *prop;
> + const char *clk_name;
> +
> + if (!node) {
> + dev_err(&pdev->dev, "Cannot find scpsys node: %ld\n",
> + PTR_ERR(node));
> + return PTR_ERR(node);
> + }
> +
> + prefix_len = strlen(prefix);
> +
> + of_property_for_each_string(node, "clock-names", prop, clk_name) {
> + if (!strncmp(clk_name, prefix, prefix_len) &&
> + (clk_name[prefix_len] == '-')) {
> + if (sub_clk_cnt >= MAX_SUBSYS_CLKS) {
> + dev_err(&pdev->dev,
> + "subsys clk out of range %d\n",
> + sub_clk_cnt);
> + return -ENOMEM;
> + }
> +
> + clk[sub_clk_cnt] = devm_clk_get(&pdev->dev,
> + clk_name);
> +
> + if (IS_ERR(clk[sub_clk_cnt])) {
> + dev_err(&pdev->dev,
> + "Subsys clk get fail %ld\n",
> + PTR_ERR(clk[sub_clk_cnt]));
> + return PTR_ERR(clk[sub_clk_cnt]);
> + }
> + sub_clk_cnt++;
> + }
> + }
> +
> + return sub_clk_cnt;
> +}
> +
> static void init_clks(struct platform_device *pdev, struct clk **clk)
> {
> int i;
> @@ -509,6 +564,7 @@ static struct scp *init_scp(struct platform_device *pdev,
> struct scp_domain *scpd = &scp->domains[i];
> struct generic_pm_domain *genpd = &scpd->genpd;
> const struct scp_domain_data *data = &scp_domain_data[i];
> + int clk_cnt;
>
> pd_data->domains[i] = genpd;
> scpd->scp = scp;
> @@ -537,6 +593,18 @@ static struct scp *init_scp(struct platform_device *pdev,
> data->basic_clk_id[j]);
> }
>
> + if (data->subsys_clk_prefix) {
> + clk_cnt = init_subsys_clks(pdev,
> + data->subsys_clk_prefix,
> + scpd->subsys_clk);
> + if (clk_cnt < 0) {
> + dev_err(&pdev->dev,
> + "%s: subsys clk unavailable\n",
> + data->name);
> + return ERR_PTR(clk_cnt);
> + }
> + }
> +
> genpd->name = data->name;
> genpd->power_off = scpsys_power_off;
> genpd->power_on = scpsys_power_on;
> --
> 1.8.1.1.dirty
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