linux-kernel - Re: [RFC PATCH v2 08/11] arm: dts: exynos: Add parents and #interconnect-cells to Exynos4412

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Message-ID: <61a0b84c-9154-81f6-717c-b0b684b98830@samsung.com>
Date:   Mon, 16 Dec 2019 09:57:05 +0900
From:   Chanwoo Choi <cw00.choi@...sung.com>
To:     Artur Świgoń <a.swigon@...sung.com>,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-pm@...r.kernel.org, dri-devel@...ts.freedesktop.org
Cc:     myungjoo.ham@...sung.com, inki.dae@...sung.com,
        sw0312.kim@...sung.com, georgi.djakov@...aro.org,
        leonard.crestez@....com, m.szyprowski@...sung.com,
        b.zolnierkie@...sung.com, krzk@...nel.org
Subject: Re: [RFC PATCH v2 08/11] arm: dts: exynos: Add parents and
 #interconnect-cells to Exynos4412

Hi,

Please ignore second reply. It is my mistake
to send the duplicate message because of my company firewall issue.

Regards,
Chanwoo Choi

On 12/16/19 9:55 AM, Chanwoo Choi wrote:
> Hi,
> 
> On 9/19/19 11:22 PM, Artur Świgoń wrote:
>> From: Artur Świgoń <a.swigon@...tner.samsung.com>
>>
>> This patch adds two fields to the Exynos4412 DTS:
>>   - parent: to declare connections between nodes that are not in a
>>     parent-child relation in devfreq;
>>   - #interconnect-cells: required by the interconnect framework.
>>
>> Please note that #interconnect-cells is always zero and node IDs are not
>> hardcoded anywhere. The above-mentioned parent-child relation in devfreq
>> means that there is a shared power line ('devfreq' property). The 'parent'
>> property only signifies an interconnect connection.
>>
>> Signed-off-by: Artur Świgoń <a.swigon@...tner.samsung.com>
>> ---
>>  arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 1 +
>>  arch/arm/boot/dts/exynos4412.dtsi               | 9 +++++++++
>>  2 files changed, 10 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
>> index ea55f377d17c..bdd61ae86103 100644
>> --- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
>> +++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
>> @@ -106,6 +106,7 @@
>>  &bus_leftbus {
>>  	devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
>>  	vdd-supply = <&buck3_reg>;
>> +	parent = <&bus_dmc>;
> 
> As I mentioned on other patch,
> I'm not sure to use 'parent' property for this driver.
> If possible, we better to use the standard way like OF graph
> in order to make the tree between buses. Except for making
> the connection between the buses with 'parent', looks good to me.
> 
>>  	status = "okay";
>>  };
>>  
>> diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
>> index d20db2dfe8e2..a70a671acacd 100644
>> --- a/arch/arm/boot/dts/exynos4412.dtsi
>> +++ b/arch/arm/boot/dts/exynos4412.dtsi
>> @@ -390,6 +390,7 @@
>>  			clocks = <&clock CLK_DIV_DMC>;
>>  			clock-names = "bus";
>>  			operating-points-v2 = <&bus_dmc_opp_table>;
>> +			#interconnect-cells = <0>;
>>  			status = "disabled";
>>  		};
>>  
>> @@ -398,6 +399,7 @@
>>  			clocks = <&clock CLK_DIV_ACP>;
>>  			clock-names = "bus";
>>  			operating-points-v2 = <&bus_acp_opp_table>;
>> +			#interconnect-cells = <0>;
>>  			status = "disabled";
>>  		};
>>  
>> @@ -406,6 +408,7 @@
>>  			clocks = <&clock CLK_DIV_C2C>;
>>  			clock-names = "bus";
>>  			operating-points-v2 = <&bus_dmc_opp_table>;
>> +			#interconnect-cells = <0>;
>>  			status = "disabled";
>>  		};
>>  
>> @@ -459,6 +462,7 @@
>>  			clocks = <&clock CLK_DIV_GDL>;
>>  			clock-names = "bus";
>>  			operating-points-v2 = <&bus_leftbus_opp_table>;
>> +			#interconnect-cells = <0>;
>>  			status = "disabled";
>>  		};
>>  
>> @@ -467,6 +471,7 @@
>>  			clocks = <&clock CLK_DIV_GDR>;
>>  			clock-names = "bus";
>>  			operating-points-v2 = <&bus_leftbus_opp_table>;
>> +			#interconnect-cells = <0>;
>>  			status = "disabled";
>>  		};
>>  
>> @@ -475,6 +480,7 @@
>>  			clocks = <&clock CLK_ACLK160>;
>>  			clock-names = "bus";
>>  			operating-points-v2 = <&bus_display_opp_table>;
>> +			#interconnect-cells = <0>;
>>  			status = "disabled";
>>  		};
>>  
>> @@ -483,6 +489,7 @@
>>  			clocks = <&clock CLK_ACLK133>;
>>  			clock-names = "bus";
>>  			operating-points-v2 = <&bus_fsys_opp_table>;
>> +			#interconnect-cells = <0>;
>>  			status = "disabled";
>>  		};
>>  
>> @@ -491,6 +498,7 @@
>>  			clocks = <&clock CLK_ACLK100>;
>>  			clock-names = "bus";
>>  			operating-points-v2 = <&bus_peri_opp_table>;
>> +			#interconnect-cells = <0>;
>>  			status = "disabled";
>>  		};
>>  
>> @@ -499,6 +507,7 @@
>>  			clocks = <&clock CLK_SCLK_MFC>;
>>  			clock-names = "bus";
>>  			operating-points-v2 = <&bus_leftbus_opp_table>;
>> +			#interconnect-cells = <0>;
>>  			status = "disabled";
>>  		};
>>  
>>
> 
>