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Message-Id: <20191216234204.190769-1-swboyd@chromium.org>
Date: Mon, 16 Dec 2019 15:42:04 -0800
From: Stephen Boyd <swboyd@...omium.org>
To: Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>
Cc: linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
Douglas Anderson <dianders@...omium.org>
Subject: [PATCH v2] arm64: dts: qcom: sdm845-cheza: Add cr50 spi node
Add the cr50 device to the spi controller it is attached to. This
enables /dev/tpm0 and some login things on Cheza.
Cc: Douglas Anderson <dianders@...omium.org>
Signed-off-by: Stephen Boyd <swboyd@...omium.org>
---
Changes from v1:
- Fixed node name to be tpm
arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi b/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi
index 9a4ff57fc877..b59cfd73616f 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi
@@ -651,6 +651,20 @@ &spi0 {
status = "okay";
};
+&spi5 {
+ status = "okay";
+
+ tpm@0 {
+ compatible = "google,cr50";
+ reg = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&h1_ap_int_odl>;
+ spi-max-frequency = <800000>;
+ interrupt-parent = <&tlmm>;
+ interrupts = <129 IRQ_TYPE_EDGE_RISING>;
+ };
+};
+
&spi10 {
status = "okay";
--
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