linux-kernel - Re: [PATCH 11/14] ARM: dts: sun8i: r40: Add device node for CSI0

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Message-ID: <20191216133931.wliwn5woy3hstdg3@gilmour.lan>
Date:   Mon, 16 Dec 2019 14:39:31 +0100
From:   Maxime Ripard <mripard@...nel.org>
To:     Chen-Yu Tsai <wens@...nel.org>
Cc:     Mauro Carvalho Chehab <mchehab@...nel.org>,
        Sakari Ailus <sakari.ailus@...ux.intel.com>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        linux-media@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        Chen-Yu Tsai <wens@...e.org>
Subject: Re: [PATCH 11/14] ARM: dts: sun8i: r40: Add device node for CSI0

On Mon, Dec 16, 2019 at 12:59:21AM +0800, Chen-Yu Tsai wrote:
> From: Chen-Yu Tsai <wens@...e.org>
>
> The CSI0 and CSI1 blocks are the same as found on the A20. However only
> CSI0 is supported upstream right now.
>
> Add a device node for CSI0 using the A20 compatible as a fallback, and
> the standard pinctrl options. Also add the MBUS interconnect.
>
> Signed-off-by: Chen-Yu Tsai <wens@...e.org>
> ---
>  arch/arm/boot/dts/sun8i-r40.dtsi | 36 ++++++++++++++++++++++++++++++++
>  1 file changed, 36 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
> index 82ea0b5b0710..2d1e97cc4155 100644
> --- a/arch/arm/boot/dts/sun8i-r40.dtsi
> +++ b/arch/arm/boot/dts/sun8i-r40.dtsi
> @@ -180,6 +180,20 @@ nmi_intc: interrupt-controller@...0030 {
>  			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
>  		};
>
> +		csi0: csi@...9000 {
> +			compatible = "allwinner,sun8i-r40-csi0",
> +				     "allwinner,sun7i-a20-csi0";
> +			reg = <0x01c09000 0x1000>;
> +			interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&ccu CLK_BUS_CSI0>, <&ccu CLK_CSI_SCLK>,
> +				 <&ccu CLK_DRAM_CSI0>;
> +			clock-names = "bus", "isp", "ram";
> +			resets = <&ccu RST_BUS_CSI0>;
> +			interconnects = <&mbus 5>;
> +			interconnect-names = "dma-mem";
> +			status = "disabled";
> +		};
> +
>  		mmc0: mmc@...f000 {
>  			compatible = "allwinner,sun8i-r40-mmc",
>  				     "allwinner,sun50i-a64-mmc";
> @@ -355,6 +369,20 @@ clk_out_a_pin: clk-out-a-pin {
>  				function = "clk_out_a";
>  			};
>
> +			/omit-if-no-ref/
> +			csi0_8bits_pins: csi0-8bits-pins {
> +				pins = "PE0", "PE2", "PE3", "PE4", "PE5",
> +				       "PE6", "PE7", "PE8", "PE9", "PE10",
> +				       "PE11";
> +				function = "csi0";
> +			};
> +
> +			/omit-if-no-ref/
> +			csi0_mclk_pin: csi0-mclk-pin {
> +				pins = "PE1";
> +				function = "csi0";
> +			};
> +
>  			gmac_rgmii_pins: gmac-rgmii-pins {
>  				pins = "PA0", "PA1", "PA2", "PA3",
>  				       "PA4", "PA5", "PA6", "PA7",
> @@ -624,6 +652,14 @@ gmac_mdio: mdio {
>  			};
>  		};
>
> +		mbus: dram-controller@...2000 {
> +			compatible = "allwinner,sun8i-r40-mbus";
> +			reg = <0x01c62000 0x1000>;
> +			clocks = <&ccu 155>;

We should export the clock too?

Maxime
>

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