[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20191218143725.00002f6f@Huawei.com>
Date: Wed, 18 Dec 2019 14:37:25 +0000
From: Jonathan Cameron <Jonathan.Cameron@...wei.com>
To: Brice Goglin <brice.goglin@...il.com>
CC: <linux-mm@...ck.org>, <linux-acpi@...r.kernel.org>,
<linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>, <x86@...nel.org>,
Keith Busch <keith.busch@...el.com>, <jglisse@...hat.com>,
"Rafael J . Wysocki" <rjw@...ysocki.net>, <linuxarm@...wei.com>,
"Andrew Morton" <akpm@...ux-foundation.org>,
Dan Williams <dan.j.williams@...el.com>,
Tao Xu <tao3.xu@...el.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Hanjun Guo <guohanjun@...wei.com>,
Sudeep Holla <sudeep.holla@....com>
Subject: Re: [PATCH V6 7/7] docs: mm: numaperf.rst Add brief description for
access class 1.
On Wed, 18 Dec 2019 12:34:34 +0100
Brice Goglin <brice.goglin@...il.com> wrote:
> Le 16/12/2019 à 16:38, Jonathan Cameron a écrit :
> > Try to make minimal changes to the document which already describes
> > access class 0 in a generic fashion (including IO initiatiors that
> > are not CPUs).
> >
> > Signed-off-by: Jonathan Cameron <Jonathan.Cameron@...wei.com>
> > ---
> > Documentation/admin-guide/mm/numaperf.rst | 8 ++++++++
> > 1 file changed, 8 insertions(+)
> >
> > diff --git a/Documentation/admin-guide/mm/numaperf.rst b/Documentation/admin-guide/mm/numaperf.rst
> > index a80c3c37226e..327c0d72692d 100644
> > --- a/Documentation/admin-guide/mm/numaperf.rst
> > +++ b/Documentation/admin-guide/mm/numaperf.rst
> > @@ -56,6 +56,11 @@ nodes' access characteristics share the same performance relative to other
> > linked initiator nodes. Each target within an initiator's access class,
> > though, do not necessarily perform the same as each other.
> >
> > +The access class "1" is used to allow differentiation between initiators
> > +that are CPUs and hence suitable for generic task scheduling, and
> > +IO initiators such as GPUs and CPUs. Unlike access class 0, only
> > +nodes containing CPUs are considered.
> > +
> > ================
> > NUMA Performance
> > ================
> > @@ -88,6 +93,9 @@ The latency attributes are provided in nanoseconds.
> > The values reported here correspond to the rated latency and bandwidth
> > for the platform.
> >
> > +Access class 0, takes the same form, but only includes values for CPU to
> > +memory activity.
>
>
> Shouldn't this be "class 1" here?
>
Good point.
Jonathan
> Both hunks look contradictory to me.
>
> Brice
>
>
Powered by blists - more mailing lists