[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20191218161821.GG24886@zn.tnic>
Date: Wed, 18 Dec 2019 17:18:21 +0100
From: Borislav Petkov <bp@...en8.de>
To: Sean Christopherson <sean.j.christopherson@...el.com>
Cc: Jarkko Sakkinen <jarkko.sakkinen@...ux.intel.com>,
linux-kernel@...r.kernel.org, x86@...nel.org,
linux-sgx@...r.kernel.org, akpm@...ux-foundation.org,
dave.hansen@...el.com, nhorman@...hat.com, npmccallum@...hat.com,
serge.ayoun@...el.com, shay.katz-zamir@...el.com,
haitao.huang@...el.com, andriy.shevchenko@...ux.intel.com,
tglx@...utronix.de, kai.svahn@...el.com, josh@...htriplett.org,
luto@...nel.org, kai.huang@...el.com, rientjes@...gle.com,
cedric.xing@...el.com, puiterwijk@...hat.com
Subject: Re: [PATCH v24 08/24] x86/sgx: Enumerate and track EPC sections
On Wed, Dec 18, 2019 at 07:19:44AM -0800, Sean Christopherson wrote:
> Yes, EPC pages are architecturally defined to be 4k sized and aligned.
>
> 36.5 Enclave Page Cache
>
> The EPC is divided into EPC pages. An EPC page is 4KB in size and always
> aligned on a 4KB boundary.
Aha, thx!
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
Powered by blists - more mailing lists