linux-kernel - Re: [PATCH v2 2/2] ARM: dts: exynos: Adjust bus related OPPs to the values correct for Odroids

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Message-ID: <20191219202417.GB22054@kozik-lap>
Date:   Thu, 19 Dec 2019 21:24:17 +0100
From:   Krzysztof Kozlowski <krzk@...nel.org>
To:     Marek Szyprowski <m.szyprowski@...sung.com>
Cc:     linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-pm@...r.kernel.org,
        Bartlomiej Zolnierkiewicz <b.zolnierkie@...sung.com>,
        Kamil Konieczny <k.konieczny@...sung.com>,
        Chanwoo Choi <cw00.choi@...sung.com>
Subject: Re: [PATCH v2 2/2] ARM: dts: exynos: Adjust bus related OPPs to the
 values correct for Odroids

On Thu, Dec 19, 2019 at 11:51:30AM +0100, Marek Szyprowski wrote:
> Hardkernel's Odroid XU3/XU4/HC1 boards use bootloader, which configures top
> PLLs to the following values: MPLL: 532MHz, CPLL: 666MHz and DPLL: 600MHz.
> 
> Adjust all bus related OPPs to the values that are possible to derive from
> the top PLL configured by the bootloader. Also add a comment for each bus
> describing which PLL is used for it.
> 
> The most significant change is the highest rate for wcore bus. It has been
> increased to 532MHz as this is the value configured initially by the
> bootloader. Also the voltage for this OPP is changed to match the value
> set by the bootloader.
> 
> This patch finally allows the buses to operate on the rates matching the
> values set for each OPP and fixes the following warnings observed on boot:
> 
> exynos-bus: new bus device registered: soc:bus_wcore ( 84000 KHz ~ 400000 KHz)
> exynos-bus: new bus device registered: soc:bus_noc ( 67000 KHz ~ 100000 KHz)
> exynos-bus: new bus device registered: soc:bus_fsys_apb (100000 KHz ~ 200000 KHz)
> ...
> exynos-bus soc:bus_wcore: dev_pm_opp_set_rate: failed to find current OPP for freq 532000000 (-34)
> exynos-bus soc:bus_noc: dev_pm_opp_set_rate: failed to find current OPP for freq 111000000 (-34)
> exynos-bus soc:bus_fsys_apb: dev_pm_opp_set_rate: failed to find current OPP for freq 222000000 (-34)
> 
> The problem with setting incorrect (in some cases much lower) clock rate
> for the defined OPP were there from the beginning, but went unnoticed
> because the only way to observe it was to manually check the rate of the
> respective clocks. The commit 4294a779bd8d ("PM / devfreq: exynos-bus:
> Convert to use dev_pm_opp_set_rate()") finally revealed it, because it
> enabled use of the generic code from the OPP framework, which issues the
> above mentioned warnings.
> 
> Signed-off-by: Marek Szyprowski <m.szyprowski@...sung.com>
> Tested-by: Chanwoo Choi <cw00.choi@...sung.com>
> Reviewed-by: Chanwoo Choi <cw00.choi@...sung.com>
> ---
>  arch/arm/boot/dts/exynos5422-odroid-core.dtsi | 76 +++++++++++--------

Thanks, applied.

Best regards,
Krzysztof