[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <7f0bd277632942acbdc0c41c6cd149d8543c2b3e.camel@buserror.net>
Date: Thu, 19 Dec 2019 17:54:24 -0600
From: Scott Wood <oss@...error.net>
To: yingjie_bai@....com, Kumar Gala <galak@...nel.crashing.org>
Cc: Benjamin Herrenschmidt <benh@...nel.crashing.org>,
Paul Mackerras <paulus@...ba.org>,
Michael Ellerman <mpe@...erman.id.au>,
linuxppc-dev@...ts.ozlabs.org, linux-kernel@...r.kernel.org,
Bai Yingjie <byj.tea@...il.com>
Subject: Re: [PATCH] powerpc/mpc85xx: also write addr_h to spin table for
64bit boot entry
On Mon, 2019-11-25 at 23:15 +0800, yingjie_bai@....com wrote:
> From: Bai Yingjie <byj.tea@...il.com>
>
> CPU like P4080 has 36bit physical address, its DDR physical
> start address can be configured above 4G by LAW registers.
>
> For such systems in which their physical memory start address was
> configured higher than 4G, we need also to write addr_h into the spin
> table of the target secondary CPU, so that addr_h and addr_l together
> represent a 64bit physical address.
> Otherwise the secondary core can not get correct entry to start from.
>
> This should do no harm for normal case where addr_h is all 0.
>
> Signed-off-by: Bai Yingjie <byj.tea@...il.com>
> ---
> arch/powerpc/platforms/85xx/smp.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
Acked-by: Scott Wood <oss@...error.net>
-Scott
Powered by blists - more mailing lists