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Message-ID: <CAMRc=MfS49ENPS=ousx0EY-_-HM7QGtevknb9PBkewcbk7YJ4Q@mail.gmail.com>
Date:   Thu, 19 Dec 2019 14:17:16 +0100
From:   Bartosz Golaszewski <brgl@...ev.pl>
To:     Kent Gibson <warthog618@...il.com>
Cc:     Andy Shevchenko <andy.shevchenko@...il.com>,
        Bartosz Golaszewski <bgolaszewski@...libre.com>,
        Linus Walleij <linus.walleij@...aro.org>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 10/11] gpiolib: add new ioctl() for monitoring changes
 in line info

czw., 19 gru 2019 o 14:13 Kent Gibson <warthog618@...il.com> napisał(a):
>
> On Thu, Dec 19, 2019 at 02:05:19PM +0100, Bartosz Golaszewski wrote:
> > wt., 10 gru 2019 o 18:00 Andy Shevchenko <andy.shevchenko@...il.com> napisał(a):
> > >
> > > > On a different note: why would endianness be an issue here? 32-bit
> > > > variables with 64-bit alignment should still be in the same place in
> > > > memory, right?
> > >
> > > With explicit padding, yes.
> > >
> > > > Any reason not to use __packed for this structure and not deal with
> > > > this whole compat mess?
> > >
> > > Have been suggested that explicit padding is better approach.
> > > (See my answer to Kent)
> > >
> > > > I also noticed that my change will only allow user-space to read one
> > > > event at a time which seems to be a regression with regard to the
> > > > current implementation. I probably need to address this too.
> > >
> > > Yes, but we have to have ABI v2 in place.
> >
> > Hi Andy,
> >
> > I was playing with some ideas for the new ABI and noticed that on
> > 64-bit architecture the size of struct gpiochip_info is reported to be
> > 68 bytes, not 72 as I would expect. Is implicit alignment padding not
> > applied to a struct if there's a non-64bit-aligned 32-bit field at the
> > end of it? Is there something I'm missing here?
> >
>
> Struct alignment is based on the size of the largest element.
> The largest element of struct gpiopchip_info is a __u32, so the struct
> gets 32-bit alignment, even on 64-bit.
>
> The structs with the problems all contain a __u64, and so get padded out
> to a 64-bit boundary.
>

Thanks for the clarification, now it makes sense. I assumed memory
alignment depends on the architecture. I need to educate myself more
on this subject I guess.

Bart

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