lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Fri, 20 Dec 2019 13:09:59 +0800
From:   Nicolas Boichat <drinkcat@...omium.org>
To:     Weiyi Lu <weiyi.lu@...iatek.com>
Cc:     Matthias Brugger <matthias.bgg@...il.com>,
        Rob Herring <robh@...nel.org>,
        Sascha Hauer <kernel@...gutronix.de>,
        James Liao <jamesjj.liao@...iatek.com>,
        Fan Chen <fan.chen@...iatek.com>,
        linux-arm Mailing List <linux-arm-kernel@...ts.infradead.org>,
        lkml <linux-kernel@...r.kernel.org>,
        "moderated list:ARM/Mediatek SoC support" 
        <linux-mediatek@...ts.infradead.org>,
        srv_heupstream <srv_heupstream@...iatek.com>
Subject: Re: [PATCH v11 05/10] soc: mediatek: Remove infracfg misc driver support

On Fri, Dec 20, 2019 at 1:00 PM Weiyi Lu <weiyi.lu@...iatek.com> wrote:
>
> On Fri, 2019-12-20 at 12:11 +0800, Nicolas Boichat wrote:
> > On Fri, Dec 20, 2019 at 11:46 AM Weiyi Lu <weiyi.lu@...iatek.com> wrote:
> > >
> > > In previous patches, we introduce scpsys-ext driver that covers
> > > the functions which infracfg misc driver provided.
> > > And then replace bus_prot_mask with bp_table of all compatibles.
> > > Now, we're going to remove infracfg misc drvier which is no longer
> > > being used.
> > >
> > > Signed-off-by: Weiyi Lu <weiyi.lu@...iatek.com>
> > > ---
> > >  drivers/soc/mediatek/Kconfig          | 10 -----
> > >  drivers/soc/mediatek/Makefile         |  3 +-
> > >  drivers/soc/mediatek/mtk-infracfg.c   | 79 -----------------------------------
> > >  include/linux/soc/mediatek/infracfg.h | 39 -----------------
> > >  4 files changed, 1 insertion(+), 130 deletions(-)
> > >  delete mode 100644 drivers/soc/mediatek/mtk-infracfg.c
> > >  delete mode 100644 include/linux/soc/mediatek/infracfg.h
> > > [snip]
> > > diff --git a/include/linux/soc/mediatek/infracfg.h b/include/linux/soc/mediatek/infracfg.h
> > > deleted file mode 100644
> > > index fd25f01..0000000
> > > --- a/include/linux/soc/mediatek/infracfg.h
> > > +++ /dev/null
> > > @@ -1,39 +0,0 @@
> > > -/* SPDX-License-Identifier: GPL-2.0 */
> > > -#ifndef __SOC_MEDIATEK_INFRACFG_H
> > > -#define __SOC_MEDIATEK_INFRACFG_H
> > > -
> > > -#define MT8173_TOP_AXI_PROT_EN_MCI_M2          BIT(0)
> > > -#define MT8173_TOP_AXI_PROT_EN_MM_M0           BIT(1)
> > > -#define MT8173_TOP_AXI_PROT_EN_MM_M1           BIT(2)
> > > -#define MT8173_TOP_AXI_PROT_EN_MMAPB_S         BIT(6)
> > > -#define MT8173_TOP_AXI_PROT_EN_L2C_M2          BIT(9)
> > > -#define MT8173_TOP_AXI_PROT_EN_L2SS_SMI                BIT(11)
> > > -#define MT8173_TOP_AXI_PROT_EN_L2SS_ADD                BIT(12)
> > > -#define MT8173_TOP_AXI_PROT_EN_CCI_M2          BIT(13)
> > > -#define MT8173_TOP_AXI_PROT_EN_MFG_S           BIT(14)
> > > -#define MT8173_TOP_AXI_PROT_EN_PERI_M0         BIT(15)
> > > -#define MT8173_TOP_AXI_PROT_EN_PERI_M1         BIT(16)
> > > -#define MT8173_TOP_AXI_PROT_EN_DEBUGSYS                BIT(17)
> > > -#define MT8173_TOP_AXI_PROT_EN_CQ_DMA          BIT(18)
> > > -#define MT8173_TOP_AXI_PROT_EN_GCPU            BIT(19)
> > > -#define MT8173_TOP_AXI_PROT_EN_IOMMU           BIT(20)
> > > -#define MT8173_TOP_AXI_PROT_EN_MFG_M0          BIT(21)
> > > -#define MT8173_TOP_AXI_PROT_EN_MFG_M1          BIT(22)
> > > -#define MT8173_TOP_AXI_PROT_EN_MFG_SNOOP_OUT   BIT(23)
> > > -
> > > -#define MT2701_TOP_AXI_PROT_EN_MM_M0           BIT(1)
> > > -#define MT2701_TOP_AXI_PROT_EN_CONN_M          BIT(2)
> > > -#define MT2701_TOP_AXI_PROT_EN_CONN_S          BIT(8)
> > > -
> > > -#define MT7622_TOP_AXI_PROT_EN_ETHSYS          (BIT(3) | BIT(17))
> > > -#define MT7622_TOP_AXI_PROT_EN_HIF0            (BIT(24) | BIT(25))
> > > -#define MT7622_TOP_AXI_PROT_EN_HIF1            (BIT(26) | BIT(27) | \
> > > -                                                BIT(28))
> > > -#define MT7622_TOP_AXI_PROT_EN_WB              (BIT(2) | BIT(6) | \
> > > -                                                BIT(7) | BIT(8))
> >
> > Err wait, don't you need these values in patch 04/10?
> >
>
> Actually I already duplicated those being used into scpsys-ext.h and
> then replace the header file in patch 04/10

Oh, missed that, SGTM then.

Reviewed-by: Nicolas Boichat <drinkcat@...omium.org>

> --- a/drivers/soc/mediatek/mtk-scpsys.c
> +++ b/drivers/soc/mediatek/mtk-scpsys.c
> @@ -11,7 +11,7 @@
> -#include <linux/soc/mediatek/infracfg.h>
> +#include "scpsys-ext.h"
>
> so I remove the infracfg.h directly in this patch and add those new for
> MT8183 in scpsys-ext.h
>
> > > -
> > > -int mtk_infracfg_set_bus_protection(struct regmap *infracfg, u32 mask,
> > > -               bool reg_update);
> > > -int mtk_infracfg_clear_bus_protection(struct regmap *infracfg, u32 mask,
> > > -               bool reg_update);
> > > -#endif /* __SOC_MEDIATEK_INFRACFG_H */
> > > --
> > > 1.8.1.1.dirty
>

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ