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Message-Id: <20191220101719.3024693-2-vkoul@kernel.org>
Date: Fri, 20 Dec 2019 15:47:15 +0530
From: Vinod Koul <vkoul@...nel.org>
To: Kishon Vijay Abraham I <kishon@...com>
Cc: linux-arm-msm@...r.kernel.org,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Andy Gross <agross@...nel.org>, Can Guo <cang@...eaurora.org>,
Jeffrey Hugo <jeffrey.l.hugo@...il.com>,
linux-kernel@...r.kernel.org, Evan Green <evgreen@...omium.org>,
Vinod Koul <vkoul@...nel.org>
Subject: [PATCH v2 1/5] phy: qcom-qmp: Increase PHY ready timeout
From: Bjorn Andersson <bjorn.andersson@...aro.org>
It's typical for the QHP PHY to take slightly above 1ms to initialize,
so increase the timeout of the PHY ready check to 10ms - as already done
in the downstream PCIe driver.
Signed-off-by: Bjorn Andersson <bjorn.andersson@...aro.org>
Tested-by: Evan Green <evgreen@...omium.org>
Tested-by: Vinod Koul <vkoul@...nel.org>
Signed-off-by: Vinod Koul <vkoul@...nel.org>
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c
index 091e20303a14..66f91726b8b2 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
@@ -66,7 +66,7 @@
/* QPHY_V3_PCS_MISC_CLAMP_ENABLE register bits */
#define CLAMP_EN BIT(0) /* enables i/o clamp_n */
-#define PHY_INIT_COMPLETE_TIMEOUT 1000
+#define PHY_INIT_COMPLETE_TIMEOUT 10000
#define POWER_DOWN_DELAY_US_MIN 10
#define POWER_DOWN_DELAY_US_MAX 11
--
2.23.0
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