linux-kernel - RE: [PATCH v4 4/7] iommu/vt-d: Setup pasid entries for iova over first level

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Message-ID: <A2975661238FB949B60364EF0F2C25743A13A334@SHSMSX104.ccr.corp.intel.com>
Date:   Fri, 20 Dec 2019 11:44:15 +0000
From:   "Liu, Yi L" <yi.l.liu@...el.com>
To:     Lu Baolu <baolu.lu@...ux.intel.com>,
        Joerg Roedel <joro@...tes.org>,
        "David Woodhouse" <dwmw2@...radead.org>,
        Alex Williamson <alex.williamson@...hat.com>
CC:     "Raj, Ashok" <ashok.raj@...el.com>,
        "Kumar, Sanjay K" <sanjay.k.kumar@...el.com>,
        "jacob.jun.pan@...ux.intel.com" <jacob.jun.pan@...ux.intel.com>,
        "Tian, Kevin" <kevin.tian@...el.com>,
        "Sun, Yi Y" <yi.y.sun@...el.com>, Peter Xu <peterx@...hat.com>,
        "iommu@...ts.linux-foundation.org" <iommu@...ts.linux-foundation.org>,
        "kvm@...r.kernel.org" <kvm@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH v4 4/7] iommu/vt-d: Setup pasid entries for iova over
 first level

> From: Lu Baolu [mailto:baolu.lu@...ux.intel.com]
> Sent: Thursday, December 19, 2019 11:17 AM
> To: Joerg Roedel <joro@...tes.org>; David Woodhouse <dwmw2@...radead.org>;
> Alex Williamson <alex.williamson@...hat.com>
> Subject: [PATCH v4 4/7] iommu/vt-d: Setup pasid entries for iova over first level
> 
> Intel VT-d in scalable mode supports two types of page tables for IOVA translation:
> first level and second level. The IOMMU driver can choose one from both for IOVA
> translation according to the use case. This sets up the pasid entry if a domain is
> selected to use the first-level page table for iova translation.
> 
> Signed-off-by: Lu Baolu <baolu.lu@...ux.intel.com>
> ---
>  drivers/iommu/intel-iommu.c | 48 +++++++++++++++++++++++++++++++++++--
>  include/linux/intel-iommu.h | 16 ++++++++-----
>  2 files changed, 56 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c index
> 2b5a47584baf..f0813997dea2 100644
> --- a/drivers/iommu/intel-iommu.c
> +++ b/drivers/iommu/intel-iommu.c
> @@ -571,6 +571,11 @@ static inline int domain_type_is_si(struct dmar_domain
> *domain)
>  	return domain->flags & DOMAIN_FLAG_STATIC_IDENTITY;  }
> 
> +static inline bool domain_use_first_level(struct dmar_domain *domain) {
> +	return domain->flags & DOMAIN_FLAG_USE_FIRST_LEVEL; }
> +
>  static inline int domain_pfn_supported(struct dmar_domain *domain,
>  				       unsigned long pfn)
>  {
> @@ -2288,6 +2293,8 @@ static int __domain_mapping(struct dmar_domain
> *domain, unsigned long iov_pfn,
>  		return -EINVAL;
> 
>  	prot &= DMA_PTE_READ | DMA_PTE_WRITE | DMA_PTE_SNP;
> +	if (domain_use_first_level(domain))
> +		prot |= DMA_FL_PTE_PRESENT | DMA_FL_PTE_XD;
> 
>  	if (!sg) {
>  		sg_res = nr_pages;
> @@ -2515,6 +2522,36 @@ dmar_search_domain_by_dev_info(int segment, int bus,
> int devfn)
>  	return NULL;
>  }
> 
> +static int domain_setup_first_level(struct intel_iommu *iommu,
> +				    struct dmar_domain *domain,
> +				    struct device *dev,
> +				    int pasid)
> +{
> +	int flags = PASID_FLAG_SUPERVISOR_MODE;

Hi Baolu,

Could you explain a bit why PASID_FLAG_SUPERVISOR_MODE is
required?

Regards,
Yi Liu