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Message-ID: <207cef10-3da8-6a52-139c-0620b21b64af@c-s.fr>
Date: Fri, 20 Dec 2019 19:24:22 +0100
From: Christophe Leroy <christophe.leroy@....fr>
To: Thomas Gleixner <tglx@...utronix.de>
Cc: Benjamin Herrenschmidt <benh@...nel.crashing.org>,
Paul Mackerras <paulus@...ba.org>,
Michael Ellerman <mpe@...erman.id.au>,
vincenzo.frascino@....com, luto@...nel.org,
linux-kernel@...r.kernel.org, linuxppc-dev@...ts.ozlabs.org
Subject: Re: [RFC PATCH] powerpc/32: Switch VDSO to C implementation.
Hi Thomas,
In do_hres(), I see:
cycles = __arch_get_hw_counter(vd->clock_mode);
ns = vdso_ts->nsec;
last = vd->cycle_last;
if (unlikely((s64)cycles < 0))
return -1;
__arch_get_hw_counter() returns a u64 values. On the PPC, this is read
from the timebase which is a 64 bits counter.
Why returning -1 if (s64)cycles < 0 ? Does it means we have to mask out
the most significant bit when reading the HW counter ?
Christophe
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