linux-kernel - Re: [PATCH v4 0/7] Use 1st-level for IOVA translation

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Message-ID: <46169833-6fae-d37e-89c3-c3abcdd31d79@linux.intel.com>
Date:   Sun, 22 Dec 2019 15:00:38 +0800
From:   Lu Baolu <baolu.lu@...ux.intel.com>
To:     "Liu, Yi L" <yi.l.liu@...el.com>, Joerg Roedel <joro@...tes.org>,
        David Woodhouse <dwmw2@...radead.org>,
        Alex Williamson <alex.williamson@...hat.com>
Cc:     "Tian, Kevin" <kevin.tian@...el.com>,
        "Raj, Ashok" <ashok.raj@...el.com>,
        "kvm@...r.kernel.org" <kvm@...r.kernel.org>,
        "Kumar, Sanjay K" <sanjay.k.kumar@...el.com>,
        "iommu@...ts.linux-foundation.org" <iommu@...ts.linux-foundation.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "Sun, Yi Y" <yi.y.sun@...el.com>
Subject: Re: [PATCH v4 0/7] Use 1st-level for IOVA translation

Hi Yi,

On 12/21/19 11:14 AM, Lu Baolu wrote:
> Hi again,
> 
> On 2019/12/20 19:50, Liu, Yi L wrote:
>> 3) Per VT-d spec, FLPT has canonical requirement to the input
>> addresses. So I'd suggest to add some enhance regards to it.
>> Please refer to chapter 3.6:-).
>>
>> 3.6 First-Level Translation
>> First-level translation restricts the input-address to a canonical 
>> address (i.e., address bits 63:N have
>> the same value as address bit [N-1], where N is 48-bits with 4-level 
>> paging and 57-bits with 5-level
>> paging). Requests subject to first-level translation by remapping 
>> hardware are subject to canonical
>> address checking as a pre-condition for first-level translation, and a 
>> violation is treated as a
>> translation-fault.
> 
> It seems to be a conflict at bit 63. It should be the same as bit[N-1]
> according to the canonical address requirement; but it is also used as
> the XD control. Any thought?

Ignore this please. It makes no sense. :-) I confused.

Best regards,
baolu