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Message-ID: <CAAfSe-uhvyo+7ND8m5=EB+B3A855p345CyNwfwjy5pvhvCC1Vg@mail.gmail.com>
Date:   Mon, 23 Dec 2019 09:54:06 +0800
From:   Chunyan Zhang <zhang.lyra@...il.com>
To:     Rob Herring <robh@...nel.org>
Cc:     Mark Rutland <mark.rutland@....com>,
        DTML <devicetree@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Orson Zhai <orsonzhai@...il.com>,
        Baolin Wang <baolin.wang7@...il.com>,
        Chunyan Zhang <chunyan.zhang@...soc.com>
Subject: Re: [PATCH v4 3/3] arm64: dts: Add Unisoc's SC9863A SoC support

On Fri, 20 Dec 2019 at 02:36, Rob Herring <robh@...nel.org> wrote:
>
> On Mon, Dec 09, 2019 at 07:44:04PM +0800, Chunyan Zhang wrote:
> > From: Chunyan Zhang <chunyan.zhang@...soc.com>
> >
> > Add basic DT to support Unisoc's SC9863A, with this patch,
> > the board sp9863a-1h10 can run into console.
> >
> > Signed-off-by: Chunyan Zhang <chunyan.zhang@...soc.com>
> > ---
> >  arch/arm64/boot/dts/sprd/Makefile         |   3 +-
> >  arch/arm64/boot/dts/sprd/sc9863a.dtsi     | 523 ++++++++++++++++++++++
> >  arch/arm64/boot/dts/sprd/sharkl3.dtsi     | 148 ++++++
> >  arch/arm64/boot/dts/sprd/sp9863a-1h10.dts |  39 ++
> >  4 files changed, 712 insertions(+), 1 deletion(-)
> >  create mode 100644 arch/arm64/boot/dts/sprd/sc9863a.dtsi
> >  create mode 100644 arch/arm64/boot/dts/sprd/sharkl3.dtsi
> >  create mode 100644 arch/arm64/boot/dts/sprd/sp9863a-1h10.dts
>
>
> > diff --git a/arch/arm64/boot/dts/sprd/sharkl3.dtsi b/arch/arm64/boot/dts/sprd/sharkl3.dtsi
> > new file mode 100644
> > index 000000000000..3b5a94560481
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/sprd/sharkl3.dtsi
> > @@ -0,0 +1,148 @@
> > +// SPDX-License-Identifier: GPL-2.0-only
> > +/*
> > + * Unisoc Sharkl3 platform DTS file
> > + *
> > + * Copyright (C) 2019, Unisoc Inc.
> > + */
> > +
> > +/ {
> > +     interrupt-parent = <&gic>;
> > +     #address-cells = <2>;
> > +     #size-cells = <2>;
> > +
> > +     soc: soc {
> > +             compatible = "simple-bus";
> > +             #address-cells = <2>;
> > +             #size-cells = <2>;
> > +             ranges;
> > +
> > +             ap_ahb_regs: syscon@...00000 {
> > +                     compatible = "sprd,sc9863a-glbregs", "syscon";
> > +                     reg = <0 0x20e00000 0 0x4000>;
> > +             };
> > +
> > +             pub_ctrl_regs: syscon@...e0000 {
> > +                     compatible = "sprd,sc9863a-glbregs", "syscon";
>
> Having a bunch of the same compatible doesn't look right. I assume by
> the label names each of these are a different set of registers. The
> compatible should be specific enough the OS can match to a driver that
> knows the register details.
>
> Doesn't look like you use all these, so maybe drop until you do and/or

Ok, I'll drop them in this patchset, and add back when adding clock
nodes which need these syscon nodes.
Let's discuss if these syscons can have the same compatible string then.

Thanks,
Chunyan

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