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Message-ID: <26f2b7e58fd45eede50f845a57761d1f01aff3f7.camel@intel.com>
Date:   Mon, 23 Dec 2019 17:27:04 +0000
From:   "Andersen, John S" <john.s.andersen@...el.com>
To:     "liran.alon@...cle.com" <liran.alon@...cle.com>,
        "pbonzini@...hat.com" <pbonzini@...hat.com>
CC:     "jmattson@...gle.com" <jmattson@...gle.com>,
        "joro@...tes.org" <joro@...tes.org>, "bp@...en8.de" <bp@...en8.de>,
        "x86@...nel.org" <x86@...nel.org>,
        "vkuznets@...hat.com" <vkuznets@...hat.com>,
        "hpa@...or.com" <hpa@...or.com>,
        "mingo@...hat.com" <mingo@...hat.com>,
        "tglx@...utronix.de" <tglx@...utronix.de>,
        "kvm@...r.kernel.org" <kvm@...r.kernel.org>,
        "Christopherson, Sean J" <sean.j.christopherson@...el.com>,
        "wanpengli@...cent.com" <wanpengli@...cent.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [RESEND RFC 0/2] Paravirtualized Control Register pinning

On Mon, 2019-12-23 at 18:09 +0100, Paolo Bonzini wrote:
> On 23/12/19 15:48, Liran Alon wrote:
> > > Should userspace expose the CR pining CPUID feature bit, it must
> > > zero CR
> > > pinned MSRs on reboot. If it does not, it runs the risk of having
> > > the
> > > guest enable pinning and subsequently cause general protection
> > > faults on
> > > next boot due to early boot code setting control registers to
> > > values
> > > which do not contain the pinned bits.
> > 
> > Why reset CR pinned MSRs by userspace instead of KVM INIT handling?
> 
> Most MSRs are not reset by INIT, are they?
> 

As far as I can tell, KVM doesn't know if the guest is rebooted.
Userspace uses the sregs and set MSRs ioctls to reset state.
kvm_vcpu_reset is called on non-boot CPUs. kvm_vcpu_init isn't called
on reboot.

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