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Message-ID: <ca4db800-c85e-c9c0-1477-bedb1bbb2e51@codeaurora.org>
Date: Tue, 24 Dec 2019 09:09:21 +0530
From: Manu Gautam <mgautam@...eaurora.org>
To: Vinod Koul <vkoul@...nel.org>,
Kishon Vijay Abraham I <kishon@...com>
Cc: linux-arm-msm@...r.kernel.org,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Andy Gross <agross@...nel.org>, Can Guo <cang@...eaurora.org>,
Jeffrey Hugo <jeffrey.l.hugo@...il.com>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 3/4] phy: qcom-qmp: remove no_pcs_sw_reset for sm8150
On 12/23/2019 8:00 PM, Vinod Koul wrote:
> SM8150 QMPY phy for UFS and onwards the PHY_SW_RESET is present in PHY's
> PCS register so we should not mark no_pcs_sw_reset for sm8150 and
> onwards
>
> Signed-off-by: Vinod Koul <vkoul@...nel.org>
> ---
> drivers/phy/qualcomm/phy-qcom-qmp.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c
> index 4f2e65c7cf45..ce5e18f188c3 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp.c
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
> @@ -1389,7 +1389,6 @@ static const struct qmp_phy_cfg sm8150_ufsphy_cfg = {
> .pwrdn_ctrl = SW_PWRDN,
>
> .is_dual_lane_phy = true,
> - .no_pcs_sw_reset = true,
> };
>
Reviewed-by: Manu Gautam <mgautam@...eaurora.org>
--
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