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Message-Id: <20191229162515.892321194@linuxfoundation.org>
Date: Sun, 29 Dec 2019 18:17:42 +0100
From: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To: linux-kernel@...r.kernel.org
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
stable@...r.kernel.org, Paul Burton <paul.burton@...s.com>,
linux-mips@...r.kernel.org, Huacai Chen <chenhc@...ote.com>,
Jiaxun Yang <jiaxun.yang@...goat.com>,
Sasha Levin <sashal@...nel.org>
Subject: [PATCH 4.19 060/219] MIPS: syscall: Emit Loongson3 sync workarounds within asm
From: Paul Burton <paul.burton@...s.com>
[ Upstream commit e84957e6ae043bb83ad6ae7e949a1ce97b6bbfef ]
Generate the sync instructions required to workaround Loongson3 LL/SC
errata within inline asm blocks, which feels a little safer than doing
it from C where strictly speaking the compiler would be well within its
rights to insert a memory access between the separate asm statements we
previously had, containing sync & ll instructions respectively.
Signed-off-by: Paul Burton <paul.burton@...s.com>
Cc: linux-mips@...r.kernel.org
Cc: Huacai Chen <chenhc@...ote.com>
Cc: Jiaxun Yang <jiaxun.yang@...goat.com>
Cc: linux-kernel@...r.kernel.org
Signed-off-by: Sasha Levin <sashal@...nel.org>
---
arch/mips/kernel/syscall.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c
index 69c17b549fd3..10990434bf94 100644
--- a/arch/mips/kernel/syscall.c
+++ b/arch/mips/kernel/syscall.c
@@ -37,6 +37,7 @@
#include <asm/signal.h>
#include <asm/sim.h>
#include <asm/shmparam.h>
+#include <asm/sync.h>
#include <asm/sysmips.h>
#include <asm/switch_to.h>
@@ -135,6 +136,7 @@ static inline int mips_atomic_set(unsigned long addr, unsigned long new)
" .set "MIPS_ISA_ARCH_LEVEL" \n"
" li %[err], 0 \n"
"1: \n"
+ " " __SYNC(full, loongson3_war) " \n"
user_ll("%[old]", "(%[addr])")
" move %[tmp], %[new] \n"
"2: \n"
--
2.20.1
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