linux-kernel - RE: [PATCH v2 2/2] arm64: dts: realtek: Add RTD1319 SoC and Realtek PymParticle EVB

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Date:   Sun, 29 Dec 2019 07:46:57 +0000
From:   James Tai <james.tai@...ltek.com>
To:     Marc Zyngier <maz@...nel.org>
CC:     "linux-realtek-soc@...ts.infradead.org" 
        <linux-realtek-soc@...ts.infradead.org>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        Robin Murphy <robin.murphy@....com>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>
Subject: RE: [PATCH v2 2/2] arm64: dts: realtek: Add RTD1319 SoC and Realtek PymParticle EVB

Hi Marc,

Thanks for review.

> > +	timer {
> > +		compatible = "arm,armv8-timer";
> > +		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
> > +			     <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
> > +			     <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
> > +			     <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
> 
> Nit: At some point, it'd be good to be able to describe the EL2 virtual timer
> interrupt too. Not specially important, but since these ARMv8.2 CPUs have it...

I will add the EL2 virtual timer interrupt to timer node.

> > +		gic: interrupt-controller@...00000 {
> > +			compatible = "arm,gic-v3";
> > +			reg = <0xff100000 0x10000>,
> > +			      <0xff140000 0xc0000>;
> 
> Are you sure about the size of the GICR region? For 4 CPUs, it should be
> 0x80000. Here, you have a range for 6 CPUs.

The GICR region should be 0x80000 because the RTD1319 SoC have only 4 CPUs.

Thank you.

Regards,
James