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Message-ID: <1577696903-27870-2-git-send-email-peng.fan@nxp.com>
Date:   Mon, 30 Dec 2019 09:13:00 +0000
From:   Peng Fan <peng.fan@....com>
To:     "sboyd@...nel.org" <sboyd@...nel.org>,
        "shawnguo@...nel.org" <shawnguo@...nel.org>,
        "s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
        "festevam@...il.com" <festevam@...il.com>,
        Abel Vesa <abel.vesa@....com>,
        Leonard Crestez <leonard.crestez@....com>
CC:     "kernel@...gutronix.de" <kernel@...gutronix.de>,
        dl-linux-imx <linux-imx@....com>,
        Aisheng Dong <aisheng.dong@....com>,
        "linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Anson Huang <anson.huang@....com>,
        Jacky Bai <ping.bai@....com>, Peng Fan <peng.fan@....com>
Subject: [PATCH 1/3] clk: imx: pll14xx: avoid modify dram pll

From: Peng Fan <peng.fan@....com>

The dram pll is only expected to be modified in firmware,
so we should only support read clk frequency in Linux Kernel.

Signed-off-by: Peng Fan <peng.fan@....com>
---
 drivers/clk/imx/clk-pll14xx.c | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.c
index 5b0519a81a7a..9288b21d4d59 100644
--- a/drivers/clk/imx/clk-pll14xx.c
+++ b/drivers/clk/imx/clk-pll14xx.c
@@ -69,8 +69,6 @@ struct imx_pll14xx_clk imx_1443x_pll = {
 
 struct imx_pll14xx_clk imx_1443x_dram_pll = {
 	.type = PLL_1443X,
-	.rate_table = imx_pll1443x_tbl,
-	.rate_count = ARRAY_SIZE(imx_pll1443x_tbl),
 	.flags = CLK_GET_RATE_NOCACHE,
 };
 
@@ -376,6 +374,10 @@ static const struct clk_ops clk_pll1443x_ops = {
 	.set_rate	= clk_pll1443x_set_rate,
 };
 
+static const struct clk_ops clk_pll1443x_min_ops = {
+	.recalc_rate	= clk_pll1443x_recalc_rate,
+};
+
 struct clk_hw *imx_clk_hw_pll14xx(const char *name, const char *parent_name,
 				  void __iomem *base,
 				  const struct imx_pll14xx_clk *pll_clk)
@@ -403,7 +405,10 @@ struct clk_hw *imx_clk_hw_pll14xx(const char *name, const char *parent_name,
 			init.ops = &clk_pll1416x_ops;
 		break;
 	case PLL_1443X:
-		init.ops = &clk_pll1443x_ops;
+		if (!pll_clk->rate_table)
+			init.ops = &clk_pll1443x_min_ops;
+		else
+			init.ops = &clk_pll1443x_ops;
 		break;
 	default:
 		pr_err("%s: Unknown pll type for pll clk %s\n",
-- 
2.16.4

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