linux-kernel - Re: [PATCH v4 4/5] clk: rockchip: add pll up and down when change pll freq

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Message-Id: <20191230190656.869962053B@mail.kernel.org>
Date:   Mon, 30 Dec 2019 11:06:55 -0800
From:   Stephen Boyd <sboyd@...nel.org>
To:     Elaine Zhang <zhangqing@...k-chips.com>, heiko@...ech.de
Cc:     mturquette@...libre.com, linux-clk@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org,
        xxx@...k-chips.com, xf@...k-chips.com, huangtao@...k-chips.com,
        Elaine Zhang <zhangqing@...k-chips.com>
Subject: Re: [PATCH v4 4/5] clk: rockchip: add pll up and down when change pll freq

Quoting Elaine Zhang (2019-12-04 00:18:58)
> set pll sequence:
>         ->set pll to slow mode or other plls
>         ->set pll down
>         ->set pll params
>         ->set pll up
>         ->wait pll lock status
>         ->set pll to normal mode
> 
> To slove the system error:

s/slove/solve/

> wait_pll_lock: timeout waiting for pll to lock
> pll_set_params: pll update unsucessful,
>                 trying to restore old params
> 
> Signed-off-by: Elaine Zhang <zhangqing@...k-chips.com>