linux-kernel - [PATCH 1/2] riscv: gcov: enable gcov for RISC-V

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Message-Id: <20200102041445.98195-2-zong.li@sifive.com>
Date:   Thu,  2 Jan 2020 12:14:44 +0800
From:   Zong Li <zong.li@...ive.com>
To:     corbet@....net, paul.walmsley@...ive.com, palmer@...belt.com,
        aou@...s.berkeley.edu, anup@...infault.org,
        linux-doc@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-riscv@...ts.infradead.org
Cc:     Zong Li <zong.li@...ive.com>
Subject: [PATCH 1/2] riscv: gcov: enable gcov for RISC-V

This patch enables GCOV code coverage measurement on RISC-V.
Lightly tested on QEMU and Hifive Unleashed board, seems to work as
expected.

Signed-off-by: Zong Li <zong.li@...ive.com>
Reviewed-by: Anup Patel <anup@...infault.org>
---
 arch/riscv/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index d8efbaa78d67..a31169b02ec0 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -64,6 +64,7 @@ config RISCV
 	select SPARSEMEM_STATIC if 32BIT
 	select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
 	select HAVE_ARCH_MMAP_RND_BITS if MMU
+	select ARCH_HAS_GCOV_PROFILE_ALL
 
 config ARCH_MMAP_RND_BITS_MIN
 	default 18 if 64BIT
-- 
2.24.1