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Message-ID: <20200105104523.31006-12-chao.hao@mediatek.com>
Date: Sun, 5 Jan 2020 18:45:15 +0800
From: Chao Hao <chao.hao@...iatek.com>
To: Joerg Roedel <joro@...tes.org>, Rob Herring <robh+dt@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>
CC: <iommu@...ts.linux-foundation.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>, <wsd_upstream@...iatek.com>,
Chao Hao <chao.hao@...iatek.com>,
Jun Yan <jun.yan@...iatek.com>,
Cui Zhang <zhang.cui@...iatek.com>,
Yong Wu <yong.wu@...iatek.com>,
Anan Sun <anan.sun@...iatek.com>
Subject: [PATCH v2 11/19] iommu/mediatek: Remove pgtable info in mtk_iommu_domain
This patch will use mtk_iommu_pgtable to replace the part
of pgtable in mtk_iommu_domain, so we can remove the information
of pgtable in mtk_iommu_domain.
Signed-off-by: Chao Hao <chao.hao@...iatek.com>
---
drivers/iommu/mtk_iommu.c | 37 +++++++++++++++++--------------------
1 file changed, 17 insertions(+), 20 deletions(-)
diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index cfefdd638f1a..b34bd3abccf8 100644
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -111,9 +111,6 @@
#define MTK_M4U_TO_PORT(id) ((id) & 0x1f)
struct mtk_iommu_domain {
- struct io_pgtable_cfg cfg;
- struct io_pgtable_ops *iop;
-
struct iommu_domain domain;
};
@@ -373,6 +370,10 @@ static int mtk_iommu_attach_pgtable(struct mtk_iommu_data *data,
/* binding to pgtable */
data->pgtable = pgtable;
+ /* update HW settings */
+ writel(pgtable->cfg.arm_v7s_cfg.ttbr[0] & MMU_PT_ADDR_MASK,
+ data->base + REG_MMU_PT_BASE_ADDR);
+
dev_info(data->dev, "m4u%d attach_pgtable done!\n", data->m4u_id);
return 0;
@@ -398,8 +399,6 @@ static struct iommu_domain *mtk_iommu_domain_alloc(unsigned type)
if (iommu_get_dma_cookie(&dom->domain))
goto free_dom;
- dom->cfg = pgtable->cfg;
- dom->iop = pgtable->iop;
/* Update our support page sizes bitmap */
dom->domain.pgsize_bitmap = pgtable->cfg.pgsize_bitmap;
@@ -416,11 +415,12 @@ static struct iommu_domain *mtk_iommu_domain_alloc(unsigned type)
static void mtk_iommu_domain_free(struct iommu_domain *domain)
{
- struct mtk_iommu_domain *dom = to_mtk_domain(domain);
+ struct mtk_iommu_pgtable *pgtable = mtk_iommu_get_pgtable();
- free_io_pgtable_ops(dom->iop);
iommu_put_dma_cookie(domain);
kfree(to_mtk_domain(domain));
+ free_io_pgtable_ops(pgtable->iop);
+ kfree(pgtable);
}
static int mtk_iommu_attach_device(struct iommu_domain *domain,
@@ -433,11 +433,8 @@ static int mtk_iommu_attach_device(struct iommu_domain *domain,
return -ENODEV;
/* Update the pgtable base address register of the M4U HW */
- if (!data->m4u_dom) {
+ if (!data->m4u_dom)
data->m4u_dom = dom;
- writel(dom->cfg.arm_v7s_cfg.ttbr[0] & MMU_PT_ADDR_MASK,
- data->base + REG_MMU_PT_BASE_ADDR);
- }
mtk_iommu_config(data, dev, true);
return 0;
@@ -457,7 +454,7 @@ static void mtk_iommu_detach_device(struct iommu_domain *domain,
static int mtk_iommu_map(struct iommu_domain *domain, unsigned long iova,
phys_addr_t paddr, size_t size, int prot, gfp_t gfp)
{
- struct mtk_iommu_domain *dom = to_mtk_domain(domain);
+ struct mtk_iommu_pgtable *pgtable = mtk_iommu_get_pgtable();
struct mtk_iommu_data *data = mtk_iommu_get_m4u_data();
/* The "4GB mode" M4U physically can not use the lower remap of Dram. */
@@ -465,16 +462,16 @@ static int mtk_iommu_map(struct iommu_domain *domain, unsigned long iova,
paddr |= BIT_ULL(32);
/* Synchronize with the tlb_lock */
- return dom->iop->map(dom->iop, iova, paddr, size, prot);
+ return pgtable->iop->map(pgtable->iop, iova, paddr, size, prot);
}
static size_t mtk_iommu_unmap(struct iommu_domain *domain,
unsigned long iova, size_t size,
struct iommu_iotlb_gather *gather)
{
- struct mtk_iommu_domain *dom = to_mtk_domain(domain);
+ struct mtk_iommu_pgtable *pgtable = mtk_iommu_get_pgtable();
- return dom->iop->unmap(dom->iop, iova, size, gather);
+ return pgtable->iop->unmap(pgtable->iop, iova, size, gather);
}
static void mtk_iommu_flush_iotlb_all(struct iommu_domain *domain)
@@ -498,11 +495,11 @@ static void mtk_iommu_iotlb_sync(struct iommu_domain *domain,
static phys_addr_t mtk_iommu_iova_to_phys(struct iommu_domain *domain,
dma_addr_t iova)
{
- struct mtk_iommu_domain *dom = to_mtk_domain(domain);
+ struct mtk_iommu_pgtable *pgtable = mtk_iommu_get_pgtable();
struct mtk_iommu_data *data = mtk_iommu_get_m4u_data();
phys_addr_t pa;
- pa = dom->iop->iova_to_phys(dom->iop, iova);
+ pa = pgtable->iop->iova_to_phys(pgtable->iop, iova);
if (data->enable_4GB && pa >= MTK_IOMMU_4GB_MODE_REMAP_BASE)
pa &= ~BIT_ULL(32);
@@ -845,8 +842,8 @@ static int __maybe_unused mtk_iommu_suspend(struct device *dev)
static int __maybe_unused mtk_iommu_resume(struct device *dev)
{
struct mtk_iommu_data *data = dev_get_drvdata(dev);
+ struct mtk_iommu_pgtable *pgtable = data->pgtable;
struct mtk_iommu_suspend_reg *reg = &data->reg;
- struct mtk_iommu_domain *m4u_dom = data->m4u_dom;
void __iomem *base = data->base;
int ret;
@@ -864,8 +861,8 @@ static int __maybe_unused mtk_iommu_resume(struct device *dev)
writel_relaxed(reg->int_main_control, base + REG_MMU_INT_MAIN_CONTROL);
writel_relaxed(reg->ivrp_paddr, base + REG_MMU_IVRP_PADDR);
writel_relaxed(reg->vld_pa_rng, base + REG_MMU_VLD_PA_RNG);
- if (m4u_dom)
- writel(m4u_dom->cfg.arm_v7s_cfg.ttbr[0] & MMU_PT_ADDR_MASK,
+ if (pgtable)
+ writel(pgtable->cfg.arm_v7s_cfg.ttbr[0] & MMU_PT_ADDR_MASK,
base + REG_MMU_PT_BASE_ADDR);
return 0;
}
--
2.18.0
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