linux-kernel - Re: [PATCH v2] ARM: dts: sun8i: R40: Add SPI controllers nodes and pinmuxes

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20200106085613.mxe33t7eklj3aeld@gilmour.lan>
Date:   Mon, 6 Jan 2020 09:56:13 +0100
From:   Maxime Ripard <mripard@...nel.org>
To:     Andre Przywara <andre.przywara@....com>
Cc:     Chen-Yu Tsai <wens@...e.org>, Mark Rutland <mark.rutland@....com>,
        Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-sunxi@...glegroups.com, Icenowy Zheng <icenowy@...c.io>
Subject: Re: [PATCH v2] ARM: dts: sun8i: R40: Add SPI controllers nodes and
 pinmuxes

On Mon, Jan 06, 2020 at 12:38:49AM +0000, Andre Przywara wrote:
> The Allwinner R40 SoC contains four SPI controllers, using the newer
> sun6i design (but at the legacy addresses).
> The controller seems to be fully compatible to the A64 one, so no driver
> changes are necessary.
> The first three controllers can be used on two sets of pins, but SPI3 is
> only routed to one set on Port A.
> Only the pin groups for SPI0 on PortC and SPI1 on PortI are added here,
> because those seem to be the only one exposed on the Bananapi boards.
>
> Tested by connecting a SPI flash to a Bananapi M2 Berry SPI0 and SPI1
> header pins.
>
> Signed-off-by: Andre Przywara <andre.przywara@....com>

Applied, thanks!
Maxime

Download attachment "signature.asc" of type "application/pgp-signature" (229 bytes)