linux-kernel - Re: [PATCH v5 0/3] phy: cadence: j721e-wiz: Add Type-C plug flip support

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Mon, 6 Jan 2020 15:07:31 +0200
From:   Roger Quadros <rogerq@...com>
To:     <kishon@...com>
CC:     <aniljoy@...ence.com>, <adouglas@...ence.com>, <nsekhar@...com>,
        <jsarha@...com>, <linux-kernel@...r.kernel.org>,
        <devicetree@...r.kernel.org>
Subject: Re: [PATCH v5 0/3] phy: cadence: j721e-wiz: Add Type-C plug flip
 support



On 06/01/2020 15:06, Roger Quadros wrote:
> Hi,
> 
> On J721e platform, the 2 lanes of SERDES PHY are used to achieve
> USB Type-C plug flip support without any additional MUX component
> by using a lane swap feature.
> 
> However, the driver needs to know the Type-C plug orientation before
> it can decide whether to swap the lanes or not. This is achieved via a
> GPIO named DIR.
> 
> Another constraint is that the lane swap must happen only when the PHY
> is in inactive state. This is achieved by sampling the GPIO and
> programming the lane swap before bringing the PHY out of reset.
> 
> This series adds support to read the GPIO and accordingly program
> the Lane swap for Type-C plug flip support.
> 
> Series must be applied on top of
> https://patchwork.kernel.org/cover/11293671/
> 
> cheers,
> -roger
> 
> Changelog:
v5
  - rebased on phy/next

> v4
> - fixes in dt-binding document
>    - fix typo
>    - change to typec-dir-debounce-ms and add min/max/default values
>    - drop reference to uint32 type
> - fixes in driver
>    - change to updated typec-dir-debounce-ms property
>    - add limit checks and use default value if not specified
> 
> v3
> - Rebase on v2 of PHY series and update DT binding to yaml
> 
> v2
> - revise commit log of patch 1
> - use regmap_field in patch 3
> 
> 
> Roger Quadros (3):
>    phy: cadence: Sierra: add phy_reset hook
>    dt-bindings: phy: ti,phy-j721e-wiz: Add Type-C dir GPIO
>    phy: ti: j721e-wiz: Manage typec-gpio-dir
> 
>   .../bindings/phy/ti,phy-j721e-wiz.yaml        | 17 ++++++
>   drivers/phy/cadence/phy-cadence-sierra.c      | 10 +++
>   drivers/phy/ti/phy-j721e-wiz.c                | 61 +++++++++++++++++++
>   3 files changed, 88 insertions(+)
> 

-- 
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki