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Date:   Mon, 06 Jan 2020 12:05:59 -0600
From:   Scott Wood <oss@...error.net>
To:     yingjie_bai@....com, Kumar Gala <galak@...nel.crashing.org>
Cc:     Bai Yingjie <byj.tea@...il.com>,
        Benjamin Herrenschmidt <benh@...nel.crashing.org>,
        Paul Mackerras <paulus@...ba.org>,
        Michael Ellerman <mpe@...erman.id.au>,
        Christophe Leroy <christophe.leroy@....fr>,
        "Aneesh Kumar K.V" <aneesh.kumar@...ux.ibm.com>,
        Jason Yan <yanaijie@...wei.com>,
        Diana Craciun <diana.craciun@....com>,
        Nicolas Saenz Julienne <nsaenzjulienne@...e.de>,
        Nicholas Piggin <npiggin@...il.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Allison Randal <allison@...utok.net>,
        linuxppc-dev@...ts.ozlabs.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 2/2] powerpc/mpc85xx: also write addr_h to spin table
 for 64bit boot entry

On Mon, 2020-01-06 at 12:29 +0800, yingjie_bai@....com wrote:
> From: Bai Yingjie <byj.tea@...il.com>
> 
> CPU like P4080 has 36bit physical address, its DDR physical
> start address can be configured above 4G by LAW registers.
> 
> For such systems in which their physical memory start address was
> configured higher than 4G, we need also to write addr_h into the spin
> table of the target secondary CPU, so that addr_h and addr_l together
> represent a 64bit physical address.
> Otherwise the secondary core can not get correct entry to start from.
> 
> Signed-off-by: Bai Yingjie <byj.tea@...il.com>
> ---
>  arch/powerpc/platforms/85xx/smp.c | 9 +++++++++
>  1 file changed, 9 insertions(+)

Acked-by: Scott Wood <oss@...error.net>

-Scott


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