linux-kernel - Re: [PATCH 1/2] crypto: caam - add support for i.MX8M Nano

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <VI1PR04MB44459D41D36BCB19430BE46C8C3F0@VI1PR04MB4445.eurprd04.prod.outlook.com>
Date:   Tue, 7 Jan 2020 13:40:48 +0000
From:   Iuliana Prodan <iuliana.prodan@....com>
To:     Horia Geanta <horia.geanta@....com>,
        Shawn Guo <shawnguo@...nel.org>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        Herbert Xu <herbert@...dor.apana.org.au>
CC:     "David S. Miller" <davem@...emloft.net>,
        Aymen Sghaier <aymen.sghaier@....com>,
        Pengutronix Kernel Team <kernel@...gutronix.de>,
        Fabio Estevam <festevam@...il.com>,
        dl-linux-imx <linux-imx@....com>,
        "linux-crypto@...r.kernel.org" <linux-crypto@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 1/2] crypto: caam - add support for i.MX8M Nano

On 1/6/2020 10:02 PM, Horia Geantă wrote:
> Add support for the crypto engine used in i.mx8mn (i.MX 8M "Nano"),
> which is very similar to the one used in i.mx8mq, i.mx8mm.
> 
> Since the clocks are identical for all members of i.MX 8M family,
> simplify the SoC <--> clock array mapping table.
> 
> Signed-off-by: Horia Geantă <horia.geanta@....com>

For the series:

Tested-by: Iuliana Prodan <iuliana.prodan@....com>
Reviewed-by: Iuliana Prodan <iuliana.prodan@....com>

> ---
>   drivers/crypto/caam/ctrl.c | 8 ++++----
>   1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c
> index 6659c8d9672e..88a58a8fc533 100644
> --- a/drivers/crypto/caam/ctrl.c
> +++ b/drivers/crypto/caam/ctrl.c
> @@ -99,11 +99,12 @@ static inline int run_descriptor_deco0(struct device *ctrldev, u32 *desc,
>   
>   	if (ctrlpriv->virt_en == 1 ||
>   	    /*
> -	     * Apparently on i.MX8MQ it doesn't matter if virt_en == 1
> +	     * Apparently on i.MX8MQ, 8MM, 8MN it doesn't matter if virt_en == 1
>   	     * and the following steps should be performed regardless
>   	     */
>   	    of_machine_is_compatible("fsl,imx8mq") ||
> -	    of_machine_is_compatible("fsl,imx8mm")) {
> +	    of_machine_is_compatible("fsl,imx8mm") ||
> +	    of_machine_is_compatible("fsl,imx8mn")) {
>   		clrsetbits_32(&ctrl->deco_rsr, 0, DECORSR_JR0);
>   
>   		while (!(rd_reg32(&ctrl->deco_rsr) & DECORSR_VALID) &&
> @@ -509,8 +510,7 @@ static const struct soc_device_attribute caam_imx_soc_table[] = {
>   	{ .soc_id = "i.MX6UL", .data = &caam_imx6ul_data },
>   	{ .soc_id = "i.MX6*",  .data = &caam_imx6_data },
>   	{ .soc_id = "i.MX7*",  .data = &caam_imx7_data },
> -	{ .soc_id = "i.MX8MQ", .data = &caam_imx7_data },
> -	{ .soc_id = "i.MX8MM", .data = &caam_imx7_data },
> +	{ .soc_id = "i.MX8M*", .data = &caam_imx7_data },
>   	{ .family = "Freescale i.MX" },
>   	{ /* sentinel */ }
>   };
>