lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <74268192-4d4f-8019-804e-49b34ec52787@gaisler.com>
Date:   Wed, 8 Jan 2020 15:41:41 +0100
From:   Andreas Larsson <andreas@...sler.com>
To:     Linus Walleij <linus.walleij@...aro.org>,
        Jia-Ju Bai <baijiaju1990@...il.com>
Cc:     Bartosz Golaszewski <bgolaszewski@...libre.com>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 2/2] gpio: gpio-grgpio: fix possible
 sleep-in-atomic-context bugs in grgpio_irq_map/unmap()

On 2020-01-07 10:37, Linus Walleij wrote:
> However there is a deeper problem, this code was added by Andreas
> Larsson in 2013 and at the time this was a hacky way to deal with
> an interrupt that is actually hierarchical.
> 
> Since 2013 we have gained:
> - Hierarchical interrupt controllers
> - Hierarchical interrupt chip helpers in gpiolib
> 
> So this code really needs to be modernized using a hierarchical
> irqchip.
> 
> See for example commit:
> aa7d618ac65f ("gpio: ixp4xx: Convert to hierarchical GPIOLIB_IRQCHIP")
> for an example.
> 
> Who is using grgpio these days and could work on fixing this up?

I will put on my list to look into this. GRGPIO is used in all our 
chips, and in most designs made by our customers.

The main hurdle with the interrupt handling in the current driver was to 
both allow several lines to generate the same system interrupt and at 
the same time make sure to not register any system interrupts for any 
lines until the user actually requests it (as in the general case all 
interrupts would be registered leading to clashes with interrupts that 
cannot necessarily be shared). Hopefully, the hierarchical interrupt 
controller and chip helper functionalities can cater for these requirements.

Best regards,
Andreas Larsson

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ