lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Thu,  9 Jan 2020 14:59:01 -0600
From:   Eddie James <eajames@...ux.ibm.com>
To:     linux-aspeed@...ts.ozlabs.org
Cc:     linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        mark.rutland@....com, jason@...edaemon.net, maz@...nel.org,
        robh+dt@...nel.org, tglx@...utronix.de, joel@....id.au,
        andrew@...id.au, eajames@...ux.ibm.com
Subject: [PATCH v5 10/12] ARM: dts: aspeed: ast2600: Add XDMA Engine

Add a node for the XDMA engine with all the necessary information.

Signed-off-by: Eddie James <eajames@...ux.ibm.com>
Reviewed-by: Andrew Jeffery <andrew@...id.au>
---
 arch/arm/boot/dts/aspeed-g6.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
index 6557212108a8..974cfa3cb287 100644
--- a/arch/arm/boot/dts/aspeed-g6.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6.dtsi
@@ -3,6 +3,7 @@
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/clock/ast2600-clock.h>
+#include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
 
 / {
 	model = "Aspeed BMC";
@@ -291,6 +292,18 @@ rng: hwrng@...e2524 {
 				quality = <100>;
 			};
 
+			xdma: xdma@...e7000 {
+				compatible = "aspeed,ast2600-xdma";
+				reg = <0x1e6e7000 0x100>;
+				clocks = <&syscon ASPEED_CLK_GATE_BCLK>;
+				resets = <&syscon ASPEED_RESET_DEV_XDMA>;
+				interrupts-extended = <&gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+						      <&scu_ic0 ASPEED_AST2600_SCU_IC0_PCIE_PERST_LO_TO_HI>;
+				pcie-device = "bmc";
+				aspeed,scu = <&syscon>;
+				status = "disabled";
+			};
+
 			gpio0: gpio@...80000 {
 				#gpio-cells = <2>;
 				gpio-controller;
-- 
2.24.0

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ